Journal scheme for two-pass programming memory devices

1. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to perform operations comprising:

identifying, by the processing device, in a logical to physical (L2P) journal associated with the memory device, a first journal entry reflecting a two pass programming operation, wherein the two pass programming operation comprises a first pass to program data to a second memory location identified by a second physical address in a quad level cell (QLC) memory device, and wherein the two pass programming operation further comprises a second pass to program the data to the second memory location identified by the second physical address;

determining that the second pass of the two pass programming operation is complete responsive to detecting one or more of: a) an invalid value indicated by an entry in a queue associated with the two pass programming operation or b) a mismatch between a first version identifier indicated by the entry in the queue and a second version identifier indicated by the first journal entry;

responsive to determining that the second pass of the two pass programming operation is complete, causing a second journal entry of the L2P journal to associate a first physical address identifying a first memory location storing the data in a single level cell (SLC) cache with the second physical address, wherein the second journal entry corresponds to the first pass of the two pass programming operation; and

responsive to detecting a power up event following a power loss, reconstructing a L2P table using the second journal entry.

2. The system of claim 1 , wherein the operations further comprise:

programming the data in the first memory location comprises a set of SLC blockstripes; and

migrating the data from the first memory location to the second memory location for the two pass programming operation, wherein the second memory location comprises a QLC blockstripe.

3. The system of claim 2 , wherein programming the data in the first memory location further comprises adding the second journal entry to the L2P journal, wherein the second journal entry indicates that the data is programmed at the first memory location identified by the first physical address.

4. The system of claim 2 , wherein the operations further comprise adding the first journal entry to the L2P journal in response to identifying the QLC blockstripe for the two pass programming operation, wherein the first journal entry indicates that the data is programmed by the two pass programming operation.

5. The system of claim 2 , wherein the operations further comprise:

adding a queue entry to a queue in response to identifying the QLC blockstripe for the two pass programming operation; and

taking a snapshot of the queue at a power loss event, wherein the queue entry indicates whether the two pass programming operation is in progress.

6. The system of claim 5 , wherein the power loss event is an asynchronous power loss event or a controlled power down event.

7. The system of claim 2 , wherein the operations further comprise performing, based on the second journal entry, a L2P translation by translating a logical address to the second physical address.

8. A method, comprising:

identifying, by a processing device, in a logical to physical (L2P) journal associated with a memory device, a first journal entry reflecting a two pass programming operation, wherein the two pass programming operation comprises a first pass to program data to a second memory location in a quad level cell (QLC) memory device identified by a second physical address in a quad level cell (QLC) memory device, and wherein the two pass programming operation further comprises a second pass to program the data to the second memory location identified by the second physical address;

determining that the two pass programming operation has been interrupted by a power loss event responsive to detecting one or more of: a) an invalid value indicated by an entry in a queue associated with the two pass programming operation or b) a mismatch between a first version identifier indicated by the entry in the queue and a second version identifier indicated by the first journal entry;

responsive to determining that the two pass programming operation has been interrupted during a power loss event, causing a second journal entry of the L2P journal to associate a first physical address identifying a first memory location storing the data in a single level cell (SLC) cache with the second physical address, wherein the second journal entry corresponds to the first pass of the two pass programming operation; and

responsive to detecting a power up event following a power loss, reconstructing a L2P table using the second journal entry.

9. The method of claim 8 , further comprising:

programming the data in the first memory location comprises a set of SLC blockstripes; and

migrating the data from the first memory location to the second memory location for the two pass programming operation, wherein the second memory location comprises a QLC blockstripe.

10. The method of claim 9 , wherein programming the data in the first memory location further comprises adding the second journal entry to the L2P journal, wherein the second journal entry indicates that the data is programmed at the first memory location identified by the first physical address.

11. The method of claim 9 , further comprising adding the first journal entry to the L2P journal in response to identifying the QLC blockstripe for the two pass programming operation, wherein the first journal entry indicates that the data is programmed by the two pass programming operation.

12. The method of claim 9 , further comprising:

adding a queue entry to a queue in response to identifying the QLC blockstripe for the two pass programming operation; and

taking a snapshot of the queue at a power loss event, wherein the queue entry indicates whether the two pass programming operation is in progress.

13. The method of claim 8 , further comprising performing, based on the second journal entry, a L2P translation by translating a logical address to the second physical address.

14. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

identifying, by a processing device, in a logical to physical (L2P) journal associated with a memory device, a first journal entry reflecting a two pass programming operation, wherein the two pass programming operation comprises a first pass to program data to a second memory location identified by a second physical address in a quad level cell (QLC) memory device, and wherein the two pass programming operation further comprises a second pass to program the data to the second memory location identified by the second physical address;

determining that the second pass of the two pass programming operation is complete responsive to detecting one or more of: a) an invalid value indicated by an entry in a queue associated with the two pass programming operation or b) a mismatch between a first version identifier indicated by the entry in the queue and a second version identifier indicated by the first journal entry;

responsive to determining that the second pass of the two pass programming operation is complete, causing a second journal entry of the L2P to associate a first physical address identifying a first memory location storing the data in a single level cell (SLC) cache with the second physical address, wherein the second journal entry corresponds to the first pass of the two pass programming operation; and

responsive to detecting a power up event following a power loss, reconstructing a L2P table using the second journal entry.

15. The non-transitory computer-readable storage medium of claim 14 , wherein the operations further comprise:

programming the data in the first memory location comprises a set of SLC blockstripes; and

migrating the data from the first memory location to the second memory location for the two pass programming operation, wherein the second memory location comprises a QLC blockstripe.

16. The non-transitory computer-readable storage medium of claim 15 , wherein programming the data in the first memory location further comprises adding the second journal entry to the L2P journal, wherein the second journal entry indicates that the data is programmed at the first memory location identified by the first physical address.

17. The non-transitory computer-readable storage medium of claim 15 , wherein the operations further comprise adding the first journal entry to the L2P journal in response to identifying the QLC blockstripe for the two pass programming operation, wherein the first journal entry indicates that the data is programmed by the two pass programming operation.

18. The non-transitory computer-readable storage medium of claim 15 , wherein the operations further comprise:

adding a queue entry to a queue in response to identifying the QLC blockstripe for the two pass programming operation; and

taking a snapshot of the queue at a power loss event, wherein the queue entry indicates whether the two pass programming operation is in progress.

19. The non-transitory computer-readable storage medium of claim 18 , wherein the power loss event is an asynchronous power loss event or a controlled power down event.

20. The non-transitory computer-readable storage medium of claim 15 , wherein the operations further comprise performing, based on the second journal entry, a L2P translation by translating a logical address to the second physical address.