IP Library Granted Patent US 12,125,923
Granted Patent B2
US 12,125,923 · App. 17/191,173 · Granted Oct 22, 2024

High voltage diode on SOI substrate with trench-modified current path

Inventors: Jaroslav Pjencak (Dolni Becva, CZ); Moshe Agam (Portland, OR); Johan Camiel Julia Janssens (Asse, BE)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L29/861H01L21/76283H01L21/76289H01L21/76291H01L29/0649H01L29/402H01L29/6609H01L29/7824
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Quick Facts
Patent No.
US 12,125,923
App. No.
17/191,173
Granted
Oct 22, 2024
Kind
B2
Abstract

A semiconductor device may include a Silicon on Insulator (SOI) substrate, and a diode formed on the SOI substrate, the diode including a cathode region and an anode region. The semiconductor device may include at least one breakdown voltage trench disposed at an edge of the cathode region, and between the cathode region and the anode region.

Claims (46)

1. A method of making a semiconductor device, comprising:

forming a Silicon on Insulator (SOI) substrate on an insulating layer, the SOI substrate having a first conductivity type;

forming a breakdown voltage trench in the SOI substrate; and

forming a diode in the SOI substrate, including forming a cathode region of the diode adjacent to the breakdown voltage trench and having a second conductivity type, with the breakdown voltage trench having a width in a first direction between the cathode region and an anode region of the diode having the first conductivity type, and having a depth in a second direction toward the insulating layer, with the depth being greater than the width.

2. The method of claim 1 , further comprising:

forming a deep trench isolation (DTI) structure in the SOI substrate in a position to isolate the diode from at least one other circuit element formed in the SOI substrate.

3. The method of claim 2 , wherein the forming the breakdown voltage trench and the forming the DTI structure are performed during a trench etching process.

4. The method of claim 1 , wherein forming the breakdown voltage trench comprises forming the breakdown voltage trench in direct contact with the cathode region and extending beyond the cathode region in the second direction.

5. The method of claim 4 , wherein the breakdown voltage trench extends in the second direction and defines a current path through the SOI substrate between the cathode region and the anode region.

6. The method of claim 1 , wherein the forming the breakdown voltage trench comprises:

forming a first breakdown voltage trench at an edge of the cathode region; and

forming a second breakdown voltage trench between the first breakdown voltage trench and the anode region.

7. The method of claim 6 , wherein forming the second breakdown voltage trench comprises:

forming the second breakdown voltage trench adjacent to the anode region and extending beyond the anode region in the second direction.

8. The method of claim 1 , comprising:

forming the anode region including a region of opposite doping type that is shorted to an anode of the diode, the anode acting as base of a lateral Bipolar Junction Transistor (BJT), with the region of opposite doping type acting as collector of the lateral BJT.

9. The method of claim 1 , comprising:

forming the breakdown voltage trench with an airgap formed therein.

10. The method of claim 1 , comprising:

forming a vertical field plate at an opposing edge of the cathode region as the breakdown voltage trench.

11. The method of claim 10 , comprising:

providing an electrical connection of the vertical field plate to the cathode region.

12. The method of claim 10 , wherein the forming the vertical field plate comprises:

forming a first deep trench isolation structure adjacent to the cathode region that, together with a second deep trench isolation structure isolating the diode from at least one other circuit element formed in the SOI substrate, forms a pocket in which epitaxial material of the SOI substrate is maintained at a same potential as the cathode region.

13. The method of claim 1 , wherein forming the breakdown voltage trench comprises:

forming a single breakdown voltage trench that is adjacent to the cathode region and to the anode region.

14. A method of making a semiconductor device, comprising:

forming a diode in a substrate, the diode including a cathode region and an anode region; and

forming at least one trench insulator adjacent to the cathode region and having a width in a direction of the anode region and a depth perpendicular to the width, with the depth being greater than the width, the at least one trench insulator defining a diode reverse current path around the at least one trench insulator that traverses the substrate between the cathode region and the anode region.

15. The method of claim 14 , wherein forming the at least one trench insulator comprises:

forming the at least one trench insulator in direct contact with the cathode region and extending beyond the cathode region.

16. The method of claim 14 , wherein forming the at least one trench insulator comprises:

forming at least two trench insulators, including a first trench insulator at an edge of the cathode region, and a second trench insulator between the first trench insulator and the anode region.

17. The method of claim 16 , wherein the substrate includes a Silicon on Insulator (SOI) substrate, and wherein forming the second trench insulator comprises:

forming the second trench insulator adjacent to the anode region and extending beyond the anode region in a direction of an insulator of the SOI substrate.

18. The method of claim 14 , further comprising:

forming a vertical field plate disposed at an edge of the cathode region opposed to an edge of the cathode region that is adjacent to the at least one trench insulator; and

providing an electrical connection between the vertical field plate and the cathode region.

19. A method comprising:

etching a deep trench isolation structure in a Silicon-on-Insulator (SOI) substrate formed on an insulating layer, the deep trench isolation structure extending to the insulating layer;

etching a breakdown voltage trench in the SOI substrate that does not extend to the insulating layer;

filling the breakdown voltage trench with an insulating material;

forming a cathode region in the SOI substrate and within the deep trench isolation structure, the cathode region being adjacent to the breakdown voltage trench; and

forming an anode region in the SOI substrate and within the deep trench isolation structure, with the breakdown voltage trench disposed between the cathode region and the anode region, and having a depth in a direction of the insulating layer that is greater than a width in a direction between the cathode region and the anode region.

20. The method of claim 19 , wherein the etching the deep trench isolation structure and the etching the breakdown voltage trench comprise:

etching the deep trench isolation structure and the etching the breakdown voltage trench in a single etching operation.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 056595, FRAME 0177 Recorded Aug 16, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064615/0564 →
SECURITY INTEREST Recorded Jun 15, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 056595/0177 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2021
From: PJENCAK, JAROSLAV; AGAM, MOSHE; JANSSENS, JOHAN CAMIEL JULIA
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 055493/0043 →
Continuity (2)
Division 16450298 · Jun 24, 2019
Related Publication 20210193847A1 · Jun 24, 2021