Resistive random access memory device with three-dimensional cross-point structure and method of operating the same
A memory device according to an embodiment includes a first interconnect, a second interconnect, a first variable resistance member, a third interconnect, a second variable resistance member, a fourth interconnect, a fifth interconnect and a third variable resistance member. The first interconnect, the third interconnect and the fourth interconnect extend in a first direction. The second interconnect and the fifth interconnect extend in a second direction crossing the first direction. The first variable resistance member is connected between the first interconnect and the second interconnect. The second variable resistance member is connected between the second interconnect and the third interconnect. The third variable resistance member is connected between the fourth interconnect and the fifth interconnect. The fourth interconnect is insulated from the third interconnect.
1. A method for manufacturing a semiconductor memory device comprising:
forming a first conductive layer;
forming a first resistance changing layer above the first conductive layer;
etching the first conductive layer and the first resistance changing layer to be divided in a first direction;
forming a second insulating layer adjacent to the first resistance changing layer in the first direction after etching the first resistance changing layer;
forming a third insulating layer adjacent to the first resistance changing layer in the first direction via the second insulating layer, the second insulating layer being located between the first resistance changing layer and the third insulating layer in the first direction;
forming a second conductive layer above the first resistance changing layer after forming the third insulating layer;
forming a first insulating layer above the second conductive layer;
forming a third conducive layer above the second conductive layer after forming the first insulating layer;
forming a second resistance changing layer above the third conductive layer;
etching the third conductive layer and the second resistance changing layer to be divided in a second direction crossing the first direction;
forming a fourth conductive layer above the second resistance changing layer; and
etching the fourth conductive layer and the second resistance changing layer to be divided in the first direction.
2. The method according to claim 1 , further comprising:
etching the first resistance changing layer and the second conductive layer to be divided in the second direction.
3. The method according to claim 1 , further comprising:
forming a first metal layer after forming the first conductive layer and before forming the first resistance changing layer.
4. The method according to claim 3 , wherein the first metal film includes tungsten and nitrogen.
5. The method according to claim 3 , further comprising:
forming a second metal film including tungsten and nitrogen on the third conductive layer.
6. The method according to claim 1 , further comprising:
forming a circuit on a substrate, the circuit and the first resistance changing layer divided in the first direction being overlapped in a third direction crossing the first direction and the second direction.
7. The method according to claim 1 , wherein the second insulating layer includes silicon and nitrogen.
8. The method according to claim 1 , further comprising:
forming a first layer above the third conductive layer before forming the second resistance changing layer.
9. The method according to claim 8 , wherein the first layer includes tellurium.