Dual-memory driving of an electronic display

1. A display system, comprising:

a display driver comprising:

a first memory configured to store, of a frame, only a first digital data signal generated by a controller to cause presentation of the frame via emission of light from a portion of a display of the display system at a target gray level, wherein the target gray level is represented by a value within a data range, and wherein the value is configured to be represented partially through the first digital data signal and partially through a second digital data signal generated by the controller; and

a pixel circuit communicatively coupled to the display driver, wherein the pixel circuit comprises:

a second memory configured to store, of the frame, only the second digital data signal received from the controller; and

a light-emitting diode configured to emit light at a brightness corresponding to the target gray level at least in part by:

emitting light according to the first digital data signal for a first duration of time; and

emitting light according to the second digital data signal for a second duration of time.

2. The display system of claim 1 , comprising:

a counter; and

a first comparator that compares the first digital data signal to a first portion of bits of a binary output from the counter to determine that the first portion of bits of the binary output from the counter matches the first digital data signal.

3. The display system of claim 2 , wherein the pixel circuit is configured to drive the light-emitting diode to emit light according to the first digital data signal for the first duration of time in response to the first comparator determining that the binary output from the counter matches the first digital data signal.

4. The display system of claim 2 , wherein the first comparator determines that the binary output from the counter matches the first digital data signal at least in part by comparing a most significant bit of a count represented by the binary output from the counter to the first digital data signal, wherein the first digital data signal is configured to represent a most significant bit of a plurality of bits representing the value within the data range.

5. The display system of claim 4 , wherein the pixel circuit comprises a second comparator that compares the second digital data signal to a second subset of the binary output from the counter to determine that the second subset of the binary output from the counter matches the second digital data signal.

6. The display system of claim 1 , wherein the pixel circuit comprises:

an initialization transistor configured to initialize the pixel circuit before the light-emitting diode emits light; and

a driving transistor configured to activate based at least in part on the second digital data signal.

7. The display system of claim 6 , wherein the driving transistor is configured as a metal-oxide-semiconductor field-effect transistor (MOSFET), and wherein the pixel circuit comprises a plurality of p-type or n-type MOSFETs configured to cause the light-emitting diode to emit light in response to control signals.

8. The display system of claim 1 , wherein the second memory comprises a register configured to store the second digital data signal and a comparator configured to compare the second digital data signal to an output generated by a counter, and wherein the second memory is configured to transmit an output from the comparator to cause the light-emitting diode to emit light.

9. An electronic device, comprising:

a display driver comprising a first memory configured to store, of a frame, only a first digital data signal; and

a display panel comprising a plurality of pixels including a first pixel, wherein the first pixel comprises a second memory configured to store, of the frame, only a second digital data signal, wherein the display panel is configured to emit light from the first pixel at a target gray level over a first duration of time corresponding to the frame, wherein the target gray level is represented by using the first digital data signal to emit light during a second duration of time corresponding to a first sub-frame of the frame and by using the second digital data signal to emit light during a third duration of time corresponding to a second sub-frame of the frame.

10. The electronic device of claim 9 , wherein the first pixel is configured to emit light according to the first digital data signal while the second memory is loaded with the second digital data signal.

11. The electronic device of claim 9 , wherein the plurality of pixels includes a second pixel, wherein the second pixel comprises a third memory, and wherein the third memory is stored with a third digital data signal while the first pixel is driven to emit light according to the second digital data signal.

12. The electronic device of claim 9 , wherein the first memory is loaded with the first digital data signal at a start time substantially simultaneous to a start time of loading the second memory with the second digital data signal.

13. The electronic device of claim 9 , comprising a controller configured to arbitrate transmission of digital data signals corresponding to each of the plurality of pixels at least in part by controlling multiplexing circuitry.

14. The electronic device of claim 9 , wherein the first pixel comprises a light-emitting diode, an organic light-emitting diode, or circuitry supporting a liquid crystal display, a plasma display panel, a dot-matrix display, a digital mirror drive display, or any combination thereof.

15. A method, comprising:

storing, via a controller associated with a display comprising a first pixel that emits light according to a target gray level, a first binary value in a first memory and a second binary value in a second memory, wherein the target gray level is represented by a binary sequence represented by including the first binary value in the binary sequence before the second binary value;

driving, via the controller, the first pixel to emit light based at least in part on the first binary value in the first memory at least in part by:

incrementing, via the controller, a count maintained by a counter of the display; and

comparing, via the controller, a first portion of a binary output from the counter to the first binary value to determine that the count is greater than or equal to the first binary value, wherein the binary output from the counter is configured to identify a current state of the count;

driving, via the controller, the first pixel to emit light based at least in part on the second binary value in the second memory in response to determining that the count is greater than or equal to the second binary value at least in part by:

incrementing, via the controller, the count maintained by the counter; and

comparing, via the controller, a second portion of the binary output to the second binary value to determine that the count is greater than or equal to the second binary value; and

driving, via the controller, the first pixel to stop light emission for a remaining duration of time allocated for presenting an image frame in response to determining that the count is greater than or equal to the second binary value.

16. The method of claim 15 , comprising:

initializing, via the controller, the first pixel before driving the first pixel to emit light based at least in part on the first binary value; and

precharging, via the controller, a node of the first pixel before incrementing the count maintained by the counter.

17. The method of claim 15 , wherein the first portion of the binary output corresponds to a most significant bit position of the binary sequence, and wherein the second portion of the binary output corresponds to any remaining bit positions of the binary sequence.

18. The method of claim 15 , comprising resetting, via the controller, the first pixel and comparator circuitry used to perform the comparisons to reset a voltage to prepare for a subsequent image frame.

19. The method of claim 15 , comprising:

driving, via the controller, the first pixel to emit light based at least in part on the first binary value at least in part by:

disabling, via the controller, a switch disposed between the second memory and the first pixel in response to a first comparison result configured to indicate the count is less than or equal to the first binary value; and

enabling, via the controller, the switch in response to determining that the count is greater than the first binary value.

20. The method of claim 19 , wherein driving the first pixel to emit light based at least in part on the second binary value also comprises loading, via the controller, a second comparison result into an inverter pair coupled to light-emitting circuitry of the first pixel during a write back period.