IP Library › Granted Patent US 11,482,269
Granted Patent B2
US 11,482,269 · App. 17/199,726 · Granted Oct 25, 2022

Semiconductor memory device

Inventors: Kunifumi Suzuki (Yokkaichi, JP); Kiwamu Sakuma (Yokkaichi, JP)
Assignee: Kioxia Corporation
G11C11/2275G11C11/221G11C11/223G11C11/2273G11C11/2277H01L27/11514H01L27/11597
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Quick Facts
Patent No.
US 11,482,269
App. No.
17/199,726
Granted
Oct 25, 2022
Kind
B2
Abstract

A semiconductor memory device includes a first memory transistor, a first memory capacitor, and a control circuit connected to them. The first memory transistor includes a first gate electrode, a first semiconductor layer, and a first insulating film containing an insulating material. The first memory capacitor includes a first electrode, a second electrode, and a second insulating film containing the insulating material of the first insulating film. The control circuit is configured to perform a first program operation that supplies the first gate electrode with a first program voltage, a second program operation that supplies the first gate electrode with a second program voltage larger than the first program voltage, and a first read operation that supplies at least one of the first electrode or the second electrode with a voltage. The control circuit performs the first or the second program operation after performing the first read operation.

Claims (28)

1. A semiconductor memory device comprising

a first memory transistor, a first memory capacitor, and a control circuit connected to the first memory transistor and the first memory capacitor, wherein

the first memory transistor includes:

a first gate electrode;

a first semiconductor layer opposed to the first gate electrode; and

a first insulating film disposed between the first gate electrode and the first semiconductor layer and containing an insulating material,

the first memory capacitor includes:

a first electrode;

a second electrode opposed to the first electrode; and

a second insulating film disposed between the first electrode and the second electrode, the second insulating film containing the insulating material of the first insulating film,

the control circuit is configured to perform:

a first program operation that supplies the first gate electrode with a first program voltage;

a second program operation that supplies the first gate electrode with a second program voltage larger than the first program voltage; and

a first read operation that supplies at least one of the first electrode or the second electrode with a voltage, wherein

the control circuit performs the first program operation or the second program operation after performing the first read operation.

2. The semiconductor memory device according to claim 1 , comprising:

a plurality of the first gate electrodes arranged in a first direction;

the first semiconductor layer extending in the first direction; and

the first insulating film disposed between the plurality of first gate electrodes and the first semiconductor layer.

3. The semiconductor memory device according to claim 2 , comprising:

the first electrode extending in the first direction, the first electrode having an outer peripheral surface covered with the first semiconductor layer; and

the second electrode extending in the first direction, the second electrode having an outer peripheral surface covered with the first electrode.

4. The semiconductor memory device according to claim 1 , wherein

the first insulating film and the second insulating film contain oxygen (O) and hafnium (Hf).

5. The semiconductor memory device according to claim 4 , wherein

the first insulating film and the second insulating film contain orthorhombic crystals as a crystalline structure.

6. The semiconductor memory device according to claim 1 , wherein

the insulating material of the first insulating film and the second insulating film is a ferroelectric material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2021
From: SUZUKI, KUNIFUMI; SAKUMA, KIWAMU
To: KIOXIA CORPORATION
Reel/Frame 055573/0663 →
Priority Claims (1)
JP JP2020-158205 · Sep 23, 2020 · national
Continuity (1)
Related Publication 20220093151A1 · Mar 24, 2022