IP Library Granted Patent US 11,532,666
Granted Patent B2
US 11,532,666 · App. 17/207,728 · Granted Dec 20, 2022

Magnetoresistive random access memory

Inventors: Ting-Hsiang Huang (Tainan, TW); Yi-Chung Sheng (Tainan, TW); Sheng-Yuan Hsueh (Tainan, TW); Kuo-Hsing Lee (Hsinchu County, TW); Chih-Kai Kang (Tainan, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L27/224H01L43/02H01L43/08
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Quick Facts
Patent No.
US 11,532,666
App. No.
17/207,728
Granted
Dec 20, 2022
Kind
B2
Abstract

A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region, and a first metal interconnection on the MTJ. Preferably, a top view of the MTJ includes a circle, a top view of the first metal interconnection includes a flat oval overlapping the circle, and the MTJ includes a bottom electrode, a fixed layer, a free layer, a capping layer, and a top electrode.

Claims (21)

1. A semiconductor device, comprising:

a substrate having a magnetic tunneling junction (MTJ) region and a logic region;

a magnetic tunneling junction (MTJ) on the MTJ region, wherein a top view of the MTJ comprises a circle and the MTJ comprises:

a bottom electrode;

a fixed layer;

a free layer;

a capping layer;

a top electrode; and

a first metal interconnection on and directly contacting the MTJ, wherein a top view of the first metal interconnection comprises a flat oval overlapping the circle.

2. The semiconductor device of claim 1 , wherein the flat oval comprises:

a first tangent line extending along a first direction; and

a second tangent line extending along the first direction, wherein the first tangent line and the second tangent line are in parallel.

3. The semiconductor device of claim 2 , wherein the flat oval comprises:

a first curve on one side of the circle and connecting the first tangent line and the second tangent line; and

a second curve on another side of the circle and connecting the first tangent line and the second tangent line.

4. The semiconductor device of claim 2 , wherein the flat oval comprises a short axis extending along a second direction and a ratio of the short axis to a diameter of the circle is greater than 0.7 and less than 1.3.

5. The semiconductor device of claim 4 , wherein the first direction is orthogonal to the second direction.

6. The semiconductor device of claim 2 , wherein the flat oval comprises a long axis extending along the first direction and a ratio of the long axis to a diameter of the circle is greater than 2 and less than 3.3.

7. The semiconductor device of claim 1 , further comprising:

a second metal interconnection on the logic region, wherein a top view of the second metal interconnection comprises a quadrilateral.

8. The semiconductor device of claim 7 , wherein the first metal interconnection and the second metal interconnection are on a same level.

Priority Claims (1)
CN 201910384092.0 · May 9, 2019 · national
Continuity (2)
Continuation 16430437 · Jun 4, 2019
Related Publication 20210210550A1 · Jul 8, 2021