GaN-based threshold switching device and memory diode
View Patent ↗A switching device including a GaN substrate; an unintentionally doped GaN layer on a first surface of the GaN substrate; a regrown unintentionally doped GaN layer on the unintentionally doped GaN layer; a regrowth interface between the unintentionally doped GaN layer and the regrown unintentionally doped GaN layer; a p-GaN layer on the regrown unintentionally doped GaN layer; a first electrode on the p-GaN layer; and a second electrode on a second surface of the GaN substrate.
1. A method for fabricating a switching device, the method comprising:
depositing a first unintentionally doped GaN layer on a first surface of a GaN substrate;
depositing a n + -GaN layer on the first unintentionally doped GaN layer;
etching away a portion of the n + -GaN layer and a portion of the first unintentionally doped GaN layer to yield a first etched surface and a second etched surface on the first unintentionally doped GaN layer;
regrowing a second unintentionally doped GaN layer on the first etched surface and the second etched surface of the first unintentionally doped GaN layer;
regrowing a p-GaN layer on the second unintentionally doped GaN layer;
etching away a portion of the p-GaN layer and the second unintentionally doped GaN layer to yield an etched surface on the n + -GaN layer;
forming a first electrode on the etched surface of the n + -GaN layer;
forming a second electrode on the p-GaN layer; and
forming a third electrode on a second surface of the GaN substrate.
2. The method of claim 1 , wherein a lateral p-n junction is defined between the first electrode and the second electrode.
3. The method of claim 1 , wherein a vertical p-n junction is defined between the second electrode and the third electrode.
4. The method of claim 1 , wherein etching away the portion of the n + -GaN layer and the portion of the first unintentionally doped GaN layer comprises forming a mesa pattern.
5. The method of claim 1 , wherein regrowing the second unintentionally doped GaN layer further comprises regrowing the second unintentionally doped GaN layer on a first etched surface and a second etched surface of the n + -GaN layer.
6. The method of claim 5 , wherein the first etched surface of the first unintentionally doped GaN layer and the first etched surface of the n + -GaN layer are substantially parallel.
7. The method of claim 5 , wherein the second etched surface of the first unintentionally doped GaN layer and the second etched surface of the n + -GaN layer form a path between the first etched surface of the first unintentionally doped GaN layer and the first etched surface of the n + -GaN layer.
8. A method for fabricating a switching device, the method comprising:
depositing a first unintentionally doped GaN layer on a first surface of a GaN substrate;
etching away a portion of the first unintentionally doped GaN layer to yield an etched surface on the first unintentionally doped GaN layer;
regrowing a second unintentionally doped GaN layer on the etched surface of the first unintentionally doped GaN layer;
regrowing a p-GaN layer on the second unintentionally doped GaN layer;
forming a first electrode on the p-GaN layer; and
forming a second electrode on a second surface of the GaN substrate.
9. The method of claim 8 , wherein a vertical p-n junction is defined between the first electrode and the second electrode.
10. The method of claim 8 , wherein etching away the portion of the first unintentionally doped GaN layer comprises forming a mesa pattern.