IP Library › Granted Patent US 11,587,211
Granted Patent B2
US 11,587,211 · App. 17/217,246 · Granted Feb 21, 2023

Image distortion correction circuit and display device

Inventor: Yuki Imatoh (Yokohama, JP)
Assignee: LAPIS SEMICONDUCTOR CO., LTD.
G06T5/006G06T5/50G06T7/0002G09G5/37G06T2207/30168G09G2320/02G09G2340/14G09G2380/10
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,587,211
App. No.
17/217,246
Granted
Feb 21, 2023
Kind
B2
Abstract

An image distortion correction circuit according to the present invention comprises; a first distortion correction circuit that performs a mapping process on an input image signal to generate a distortion-corrected image signal; an inspection region defining circuit that defines an inspection image region in the one-frame image; an inspection region extraction circuit that extracts a part corresponding to the inspection image region from the distortion-corrected image signal and outputs the part of the distortion-corrected image signal as a first inspection image signal; a second distortion correction circuit that outputs a second inspection signal, the second inspection signal being generated by performing the mapping process on the part of the input image signal corresponding to the inspection image region; and a failure determination circuit that determines that a failure occurs and outputs a failure detection signal when the first inspection image signal and the second inspection image signal are mutually different.

Claims (21)

1. An image distortion correction circuit comprising:

a first distortion correction circuit that performs a mapping process on an input image signal to generate a distortion-corrected image signal, a distortion occurred in a one-frame image represented by the input image signal being corrected in the mapping process;

an inspection region defining circuit that defines an inspection image region in the one-frame image for failure inspection, the inspection image region being a part of a whole region of the one-frame image;

an inspection region extraction circuit that extracts a part corresponding to the inspection image region from the distortion-corrected image signal and outputs the part of the distortion-corrected image signal as a first inspection image signal;

a second distortion correction circuit that outputs a second inspection image signal, the second inspection image signal being generated by performing the mapping process on the part of the input image signal corresponding to the inspection image region; and

a failure determination circuit that determines that a failure occurs and outputs a failure detection signal when the first inspection image signal and the second inspection image signal are mutually different, wherein

the inspection region defining circuit changes a coordinate position of the inspection image region in the one-frame image for each frame in the input image signal.

2. The image distortion correction circuit according to claim 1 , wherein

the failure determination circuit determines whether respective pixels of the first inspection image signal and the second inspection image signal are matched, and when a percentage of match of the pixels is less than a predetermined threshold, the failure determination circuit determines that the first inspection image signal and the second inspection image signal are mutually different.

3. A display device comprising:

a first distortion correction circuit that performs a mapping process on an input image signal to generate a distortion-corrected image signal, a distortion occurred in a one-frame image represented by the input image signal being corrected in the mapping process;

an image irradiation unit that irradiates a display light to project an image indicated by the distortion-corrected image signal;

an inspection region defining circuit that defines an inspection image region in the one-frame image for failure inspection, the inspection image region being a part of a whole region of the one-frame image;

an inspection region extraction circuit that extracts a part corresponding to the inspection image region from the distortion-corrected image signal and outputs the part of the distortion-corrected image signal as a first inspection image signal;

a second distortion correction circuit that outputs a second inspection image signal, the second inspection image signal being generated by performing the mapping process on the part of the input image signal corresponding to the inspection image region in the input image signal; and

a failure determination circuit that determines that a failure occurs and outputs a failure detection signal when the first inspection image signal and the second inspection image signal are mutually different, wherein

the inspection region defining circuit changes a coordinate position of the inspection image region in the one-frame image for each frame in the input image signal.

4. The display device according to claim 3 , comprising:

a controller that generates an image signal representing various kinds of information with a character or a drawing as the input image signal; and

a notification circuit that notifies a user of a failure in response to the failure detection signal, wherein

the controller generates an image signal with enhanced transparency of the character or the drawing as the input image signal in response to the failure detection signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2021
From: IMATOH, YUKI
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 055769/0377 →
Priority Claims (1)
JP JP2020-062224 · Mar 31, 2020 · national
Continuity (1)
Related Publication 20210304372A1 · Sep 30, 2021