SECURE HETEROGENOUS COMPUTING PLATFORM
According to various embodiments disclosed herein, methods and systems for managing security vulnerabilities of a heterogeneous computing platform utilizing a microprocessor are disclosed. Specifically, methods and systems for managing attack surfaces of an instruction set architecture co-processor in communication with an FPGA control module are disclosed.
1 . A computer implemented method, comprising:
receiving, by a processor, an input data stream;
accessing, by the processor, an FPGA system;
managing security access configurations of the input data stream by the FPGA system to provide a secure input data stream to an instruction set architecture system.
2 . The computer implemented method of claim 1 , further comprising recording access to the instruction set architecture system with a hashgraph.
3 . The computer implemented method of claim 1 , wherein control of the instruction set architecture system is provided using a command line interface of the FPGA system.
4 . The computer implemented method of claim 1 wherein the instruction set architecture system is an x86 architecture.
5 . The computer implemented method of claim 1 wherein FPGA system and the instruction set architecture system are configured to cooperatively execute an FPGA application.