Virtual memory management method and processor

1. A virtual memory management method, applied to an intelligent processor, the intelligent processor comprising an operation accelerator, the virtual memory management method comprising:

selecting m storage units from a physical memory, the m storage units forming a virtual memory, each of the storage units having a predetermined data width and a predetermined data depth;

dividing the m storage units into n storage groups; and

determining an address mapping relationship of each of the storage groups to obtain n address mapping relationships, the n address mapping relationships being correspondence between n virtual memory addresses of the virtual memory and physical addresses of the m storage units;

wherein, m and n are positive integers, m is greater than or equal to n, and m and n are dynamically updated according to requirements of the operation accelerator, and

wherein each of the n virtual memory addresses corresponds to one of the n storage groups.

2. The virtual memory management method according to claim 1 , wherein the physical memory comprises a plurality of banks, each of the banks comprises the plurality of storage units, and the determining the address mapping relationship of each of the storage groups comprises:

determining a bank to which all storage units in each of the storage groups belong, and acquiring a first address tag of the bank;

acquiring a second address tag according to each storage unit in each of the storage groups; and

determining the address mapping relationship of each of the storage groups according to the first address tag and the second address tag of the storage group.

3. The virtual memory management method according to claim 2 , wherein the acquiring the first address tag of the bank comprises:

acquiring a bank serial number of the bank; and

using the bank serial number as the first address tag of the bank.

4. The virtual memory management method according to claim 2 , wherein acquiring the second address tag according to each storage unit in each of the storage groups comprises:

acquiring a storage unit serial number of each storage unit in each of the storage groups; and

determining the second address tag of the each of the storage groups according to the storage unit serial numbers of the plurality of storage units in the storage group.

5. The virtual memory management method according to claim 1 , further comprising:

cascading the n storage groups.

6. The virtual memory management method according to claim 1 , further comprising:

generating an address mapping table according to the n address mapping relationships.

7. The virtual memory management method according to claim 6 , further comprising:

allocating a virtual memory identifier to the virtual memory; and

establishing correspondence between the virtual memory identifier and the address mapping table.

8. The virtual memory management method according to claim 7 , further comprising:

acquiring the virtual memory identifier;

acquiring the address mapping table of the virtual memory according to the virtual memory identifier; and

accessing the physical memory according to the address mapping table.

9. A processor, configured to execute a program code to implement a virtual memory management method, the virtual memory management method being applied to an intelligent processor, the intelligent processor comprising an operation accelerator, the virtual memory management method comprising:

selecting m storage units from a physical memory, the m storage units forming a virtual memory, each of the storage units having a predetermined data width and a predetermined data depth;

dividing the m storage units into n storage groups; and

determining an address mapping relationship of each of the storage groups to obtain n address mapping relationships, the n address mapping relationships being correspondence between n virtual memory addresses of the virtual memory and physical addresses of the m storage units;

wherein, m and n are positive integers, m is greater than or equal to n, and m and n are dynamically updated according to requirements of the operation accelerator, and

wherein each of the n virtual memory addresses corresponds to one of the n storage groups.

10. A virtual memory management method, applied to an intelligent processor, the intelligent processor comprising a first operation accelerator and a second operation accelerator, the virtual memory management method comprising:

selecting m storage units from a physical memory, the m storage units forming a first virtual memory, each of the storage units having a predetermined data width and a predetermined data depth;

dividing the m storage units into n storage groups;

determining a first address mapping table corresponding to the first virtual memory, the first address mapping table comprising correspondence between n virtual addresses of the first virtual memory and physical addresses of the m storage units;

selecting i storage units from the physical memory, the i storage units forming a second virtual memory;

dividing the i storage units into j storage groups; and

determining a second address mapping table corresponding to the second virtual memory, the second address mapping table comprising correspondence between j virtual addresses of the second virtual memory and physical addresses of the i storage units;

wherein, the first virtual memory is for storing data of the first operation accelerator, the second virtual memory is for storing data of the second operation accelerator, m, n, i, and j are positive integers, m is greater than or equal to n, i is greater than or equal to j, and m is not equal to i, and

wherein each of the n virtual addresses corresponds to one of then storage groups.

11. The virtual memory management method according to claim 10 , further comprising:

allocating a first virtual memory identifier to the first virtual memory; and

establishing correspondence between the first virtual memory identifier and the first address mapping table.

12. The virtual memory management method according to claim 11 , further comprising:

acquiring the first virtual memory identifier;

acquiring the first address mapping table corresponding to the first virtual memory according to the first virtual memory identifier; and

accessing the physical memory according to the first address mapping table.