IP Library › Granted Patent US 12,581,957
Granted Patent B2
US 12,581,957 · App. 17/234,402 · Granted Mar 17, 2026

Anti-counterfeiting fingerprint

Inventors: Patrick M. Sain (Torrance, CA); William Paul Posey (Inlet Beach, FL)
Assignee: RAYTHEON COMPANY
H01L23/573H01L23/481H01L23/5223H01L23/5226H04L9/3278
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,581,957
App. No.
17/234,402
Granted
Mar 17, 2026
Kind
B2
Abstract

A physically unclonable function (PUF) device includes capacitor array couple to an electronic device. The capacitor array includes a plurality of parallel conductive elements coupled to a dielectric material having a spatially varying permittivity to define array of randomly valued capacitors.

Claims (24)

1 . A method of authenticating an electronic device, the method comprising:

arranging a plurality of conductive elements coupled to a dielectric material having a permittivity to define a capacitor array including a plurality of capacitors;

delivering, via one or more driver circuits, voltage to the capacitor array to energize selected capacitors among the plurality of capacitors;

reading out, via one or more receiver circuits, current that is output by the capacitor array in response receiving the voltage;

determining a capacitance corresponding to the capacitance values of the selected capacitors;

determining a digital measurement based on the capacitance; and

determining a digital signature unique to the capacitor array based on the digital measurement;

authenticating the electronic device based on the digital signature,

wherein the digital measurement is calculated from at least one ratio of capacitances defined as a first capacitance produced by a first capacitor among the plurality of capacitors and a second capacitance produced by a second capacitor among the plurality of capacitors, and

wherein the first capacitance is produced in response to activating a first driver circuit among the one or more driver circuits and activating a first receiver circuit among the one or more receiver circuits, and the second capacitance is produced in response to activating a second driver circuit among the one or more driver circuits and a second receiver circuit among the one or more receiver circuits.

2 . The method of claim 1 , further comprising:

selecting, via a controller, the one or more driver circuits to supply the voltage; and

selecting, via the controller, the one or more receiver circuits to receive the current from the capacitor array.

3 . The method of claim 2 , wherein authenticating the electronic device comprises:

determining an expected digital signature associated with the capacitor array;

comparing, via the controller, the digital signature to the expected digital signature; and

determining, via the controller, the electronic device is authentic in response to the digital signature matching the expected digital signature.

4 . The method of claim 2 , further comprising:

inputting a digital challenge to the controller;

generating the digital signature indicative of a digital response to the digital challenge;

comparing the digital response to an expected response; and

confirming the electronic device is authentic in response to the digital response matching the expected response.

5 . The method of claim 1 , wherein the first and second capacitors are established as a pair of conductive elements among the plurality of conductive elements, the pair of conductive elements in the capacitor array selected such that the first and second capacitances are measurably different from each other using the at least one ratio of capacitances.

6 . The method of claim 5 , further comprising removing at least one multiplicatively scaling effect from the capacitance that corresponds to the capacitance values of the selected capacitors, the at least one multiplicatively scaling effect including at least one of component aging, temperature variation, and power supply variation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2021
From: SAIN, PATRICK M.; POSEY, WILLIAM PAUL
To: RAYTHEON COMPANY
Reel/Frame 055968/0251 →
Continuity (1)
Related Publication 20220336379A1 · Oct 20, 2022
References Cited (57)
US 9365749B2 · Khanna · 2016 [cited by applicant]
US 9787480B2 · Guo · 2017 [cited by examiner]
US 9939400B1 · Gozzini · 2018 [cited by examiner]
US 10056905B1 · Bowers, II · 2018 [cited by examiner]
US 10103733B1 · Gurrieri · 2018 [cited by examiner]
US 10445632B2 · Kelsey et al. · 2019 [cited by applicant]
US 10560079B1 · Das · 2020 [cited by examiner]
US 10574467B2 · Afghah · 2020 [cited by examiner]
US 11240047B2 · Hurwitz · 2022 [cited by examiner]
US 11251959B2 · Wentz · 2022 [cited by examiner]
US 11290289B2 · Shen · 2022 [cited by examiner]
US 11700246B2 · Tremlet · 2023 [cited by examiner]
US 11797718B2 · Best · 2023 [cited by examiner]
US 12153663B2 · Cambou · 2024 [cited by examiner]
US 20050179446A1 · Hara · 2005 [cited by examiner]
US 20050226478A1 · Fujiyoshi · 2005 [cited by examiner]
US 20160063301A1 · Wu · 2016 [cited by examiner]
US 20160065378A1 · Kim · 2016 [cited by examiner]
US 20160149712A1 · Guo · 2016 [cited by examiner]
US 20170344407A1 · Jeon · 2017 [cited by examiner]
US 20180013431A1 · Bury et al. · 2018 [cited by applicant]
US 20180129801A1 · Cambou · 2018 [cited by examiner]
US 20180131529A1 · Cambou · 2018 [cited by examiner]
US 20180173917A1 · Endress · 2018 [cited by examiner]
US 20180341763A1 · Park · 2018 [cited by examiner]
US 20180357411A1 · Krishnamurthy · 2018 [cited by examiner]
US 20190026724A1 · Wade · 2019 [cited by examiner]
US 20190163897A1 · Cambou · 2019 [cited by examiner]
US 20190354672A1 · Cambou · 2019 [cited by examiner]
US 20200145008A1 · Strukov · 2020 [cited by examiner]
US 20210019586A1 · Dreifus · 2021 [cited by examiner]
US 20210036874A1 · Thapliyal · 2021 [cited by examiner]
US 20210073503A1 · Ohashi · 2021 [cited by examiner]
US 20210083886A1 · Lee · 2021 [cited by examiner]
US 20210091952A1 · Wentz · 2021 [cited by examiner]
US 20210135886A1 · Lee · 2021 [cited by examiner]
US 20210148977A1 · Bhunia · 2021 [cited by examiner]
US 20210184870A1 · Hurwitz · 2021 [cited by examiner]
US 20210194707A1 · Aronson · 2021 [cited by examiner]
US 20210243042A1 · Ahn · 2021 [cited by examiner]
US 20210319101A1 · Bhunia · 2021 [cited by examiner]
US 20210377058A1 · Froment · 2021 [cited by examiner]
US 20220043937A1 · Spalding · 2022 [cited by examiner]
US 20220045872A1 · Holland · 2022 [cited by examiner]
US 20220067140A1 · Cambou · 2022 [cited by examiner]
US 20220116233A1 · Hoffman · 2022 [cited by examiner]
US 20220131713A1 · Schifmann · 2022 [cited by examiner]
US 20220358253A1 · Best · 2022 [cited by examiner]
US 20230091028A1 · Norrod · 2023 [cited by examiner]
US 20230163980A1 · Cambou · 2023 [cited by examiner]
US 20250126467A1 · Garcia Morchon · 2025 [cited by examiner]
CN 103578349B · 2012 [cited by applicant]
WO 2019023290A1 · 2019 [cited by applicant]
WO WO2019136385A1 · 2019 [cited by examiner]
Wan et al., “An invasive-attack-resistant PUF based on switched-capacitor circuit” IEEE Transactions on Circuits and Systems I: Regular Papers 62.8 (Aug. 2015) pp. 2024-2034. [cited by applicant]
International Search Report and Written Opinion issued in International Application No. PCT/US2022/015024; Application Filing Date Feb. 3, 2022; Date of Mailing May 19, 2022 (17 pages). [cited by applicant]
Ramkumar et al., “Novel anisotropic conductive adhesive for 3D stacking and lead-free PCB packaging-A review” 2011 IEEE 61st Electronic Components and Technology Conference (ECTC). IEEE, (May 2011) pp. 246-254. [cited by applicant]