System discovery and signaling
An extensible communication system is described herein. The system includes a first module for receiving a root index value and for generating a constant amplitude zero auto-correlation sequence based on the root value. The system further includes a second module for receiving a seed value and for generating a Pseudo-Noise sequence based on the seed value. The system further includes a third module for modulating the constant amplitude zero auto-correlation sequence by the Pseudo-Noise sequence and for generating a complex sequence. The system further includes a fourth module for translating the complex sequence to a time domain sequence, wherein the fourth module applies a cyclic shift to the time domain sequence to obtain a shifted time domain sequence.
1. A transmitting device, comprising:
a memory configured to store program instructions; and
a processor, upon executing the program instructions, configured to:
generate a first cyclically shifted time domain sequence based on a first time domain sequence and a first absolute cyclic shift;
generate a second time domain sequence;
calculate a first relative cyclic shift associated with the second time domain sequence from a first plurality of signaling bit values associated with the second time domain sequence;
determine a second absolute cyclic shift based on the first absolute cyclic shift and the first relative cyclic shift;
generate a second cyclically shifted time domain sequence based on the second time domain sequence and the second absolute cyclic shift;
calculate a second relative cyclic shift associated with a third time domain sequence from a second plurality of signaling bit values associated with the third time domain sequence;
determine a third absolute cyclic shift based on the second absolute cyclic shift and the second relative cyclic shift;
generate a third cyclically shifted time domain sequence based on the third time domain sequence and the third absolute cyclic shift; and
broadcast the first cyclically shifted time domain sequence, the second cyclically shifted time domain sequence, and the third cyclically shifted time domain sequence.
2. The transmitting device of claim 1 , wherein the first cyclically shifted time domain sequence is configured to signal an initial time synchronization and the first absolute cyclic shift has a value of 0.
3. The transmitting device of claim 1 , wherein to determine the second absolute cyclic shift based on the first absolute cyclic shift and the first relative cyclic shift, the processor is configured to add the first relative cyclic shift and the first absolute cyclic shift.
4. The transmitting device of claim 1 , wherein the second cyclically shifted time domain sequence comprises control signaling configured to permit reception and decoding of a waveform.
5. The transmitting device of claim 1 , wherein the processor is configured to determine the first relative cyclic shift associated with the second time domain sequence based on the first plurality of signaling bit values using a Gray code.
6. The transmitting device of claim 1 , wherein the processor is further configured to:
generate a first frequency domain sequence;
translate the first frequency domain sequence to the first time domain sequence;
generate a second frequency domain sequence; and
translate the second frequency domain sequence to the second time domain sequence.
7. A method, comprising:
generating a first cyclically shifted time domain sequence based on a first time domain sequence and a first absolute cyclic shift;
generating a second time domain sequence;
calculating a first relative cyclic shift associated with the second time domain sequence from a first plurality of signaling bit values associated with the second time domain sequence;
determining a second absolute cyclic shift based on the first absolute cyclic shift and the first relative cyclic shift;
generating a second cyclically shifted time domain sequence based on the second time domain sequence and the second absolute cyclic shift;
calculating a second relative cyclic shift associated with a third time domain sequence from a second plurality of signaling bit values associated with the third time domain sequence;
determining a third absolute cyclic shift based on the second absolute cyclic shift and the second relative cyclic shift;
generating a third cyclically shifted time domain sequence based on the third time domain sequence and the third absolute cyclic shift; and
broadcasting the first cyclically shifted time domain sequence, the second cyclically shifted time domain sequence, and the third cyclically shifted time domain sequence.
8. The method of claim 7 , wherein generating the first cyclically shifted time domain sequence comprises generating the first cyclically shifted time domain sequence to signal an initial time synchronization, wherein the first absolute cyclic shift has a value of 0.
9. The method of claim 7 , wherein determining the second absolute cyclic shift based on the first absolute cyclic shift and the first relative cyclic shift comprises adding the first relative cyclic shift and the first absolute cyclic shift.
10. The method of claim 7 , wherein the second cyclically shifted time domain sequence comprises control signaling configured to permit reception and decoding of a waveform.
11. The method of claim 7 , wherein determining the first relative cyclic shift associated with the second time domain sequence comprises determining the first relative cyclic shift based on the first plurality of signaling bit values using a Gray code.
12. The method of claim 7 , further comprising:
generating a first frequency domain sequence; and
translating the first frequency domain sequence to the first time domain sequence.
13. The method of claim 12 , further comprising:
generating a second frequency domain sequence; and
translating the second frequency domain sequence to the second time domain sequence.