Time-controlled switch capacitor based temperature sensor

1. An apparatus comprising:

a diode comprising a p-n junction between a silicon substrate and a well;

a first capacitor coupled to the diode;

a second capacitor;

at least five switchable transistors, two or more of which are to charge the first and second capacitors, and to discharge the first and second capacitors;

an amplifier to compare voltages on the first and second capacitors, wherein the amplifier is coupled to at least one of the first or second capacitors; and

a circuitry coupled to an output of the amplifier, the circuitry adjusting a voltage of a terminal of the first capacitor;

wherein the at least five switchable transistors include:

a first transistor controllable by a first signal, wherein the first transistor is coupled to the amplifier and the first capacitor;

a second transistor controllable by the first signal, wherein the second transistor is coupled to the amplifier and the second capacitor;

a third transistor coupled to the first capacitor and the first transistor, wherein the third transistor is controllable by a second signal; and

a fourth transistor coupled to the second capacitor, wherein the fourth transistor is controllable by a third signal.

2. The apparatus of claim 1 , wherein the circuitry comprises a successive approximation register.

3. The apparatus of claim 1 , wherein the circuitry is to adjust a scaling factor applied to a voltage of the second capacitor according to the output of the amplifier.

4. The apparatus of claim 1 , wherein the terminal of the first capacitor is a first terminal, wherein a second terminal of the first capacitor is coupled to the diode and to the second capacitor.

5. The apparatus of claim 4 , wherein an n-type region of the diode is coupled to the second terminal of the first capacitor, and wherein a p-type region of the diode is coupled to ground.

6. The apparatus of claim 1 , wherein the at least five switchable transistors comprise:

a fifth transistor coupled in parallel to the diode, wherein the fifth transistor is controllable by a fourth signal.

7. The apparatus of claim 6 , wherein the at least five switchable transistors comprise:

a sixth transistor; and

a third capacitor coupled in series with the sixth transistor, wherein the third capacitor is to adjust the voltage of the terminal of the first capacitor.

8. The apparatus of claim 7 , wherein the third capacitor has a variable capacitance which is controllable by the circuitry.

9. An apparatus comprising:

a p-n junction between a silicon substrate and a well;

a first capacitive device coupled to the p-n junction;

a second capacitive device;

at least five switchable transistors, two or more of which are to charge the first and second capacitive devices, and to discharge the first and second capacitive devices;

a comparator circuitry to compare voltages on the first and second capacitive devices, wherein the comparator circuitry is coupled to at least one of the first or second capacitive devices; and

a successive approximation register circuitry coupled to an output of the comparator circuitry to adjust a voltage of a terminal of the first capacitive device.

10. The apparatus of claim 9 , wherein the terminal of the first capacitive device is a first terminal, wherein a second terminal of the first capacitive device is coupled to the p-n junction and to the second capacitive device.

11. The apparatus of claim 9 , wherein the successive approximation register circuitry is to adjust a scaling factor applied to a voltage of the second capacitive device according to the output of the comparator circuitry.

12. A system comprising:

a memory;

a processor coupled to the memory;

a wireless interface to allow the processor to communicate with another device, wherein the processor includes:

a diode comprising a p-n junction between a silicon substrate and a well;

a first capacitor coupled to the diode;

a second capacitor;

at least five switchable transistors, two or more of which are to charge the first and second capacitors, and to discharge the first and second capacitors;

a comparator to compare voltages on the first and second capacitors, wherein the comparator is coupled to at least one of the first or second capacitors; and

a circuitry coupled to an output of the comparator to adjust a voltage of a terminal of the first capacitor;

wherein the at least five switchable transistors include:

a first transistor controllable by a first signal, wherein the first transistor is coupled to the comparator and the first capacitor;

a second transistor controllable by the first signal, wherein the second transistor is coupled to the comparator and the second capacitor;

a third transistor coupled to the first capacitor and the first transistor, wherein the third transistor is controllable by a second signal; and

a fourth transistor coupled to the second capacitor, wherein the fourth transistor is controllable by a third signal.

13. The system of claim 12 , wherein the at least five switchable transistors further include:

a fifth transistor coupled in parallel to the diode, wherein the fifth transistor is controllable by a fourth signal.

14. The system of claim 12 , wherein the at least five switchable transistors further include:

a sixth transistor; and

a third capacitor coupled in series with the sixth transistor, wherein the third capacitor is to adjust the voltage of the terminal of the first capacitor.

15. An apparatus comprising:

a diode comprising a p-n junction between a silicon substrate and a well;

a first capacitor;

a second capacitor;

at least five switchable transistors, two or more of which are to charge the first and second capacitors, and to discharge the first and second capacitors;

an amplifier to compare voltages on the first and second capacitors, wherein the amplifier is coupled to at least one of the first or second capacitors; and

a circuitry coupled to an output of the amplifier, the circuitry adjusting a voltage of a first terminal of the first capacitor, wherein a second terminal of the first capacitor is coupled to the diode and to the second capacitor.

16. The apparatus of claim 15 , wherein an n-type region of the diode is coupled to the second terminal of the first capacitor, and wherein a p-type region of the diode is coupled to ground.

17. An apparatus comprising:

a diode comprising a p-n junction between a silicon substrate and a well;

a first capacitor coupled to the diode;

a second capacitor;

at least five switchable transistors, two or more of which are to charge the first and second capacitors, and to discharge the first and second capacitors;

an amplifier to compare voltages on the first and second capacitors, wherein the amplifier is coupled to at least one of the first or second capacitors; and

a circuitry coupled to an output of the amplifier, the circuitry adjusting a voltage of a terminal of the first capacitor, wherein the circuitry comprises a successive approximation register.

18. The apparatus of claim 17 , wherein the at least five switchable transistors include:

a first transistor controllable by a first signal, wherein the first transistor is coupled to the amplifier and the first capacitor; and

a second transistor controllable by the first signal, wherein the second transistor is coupled to the amplifier and the second capacitor.

19. The apparatus of claim 18 , wherein the at least five switchable transistors further include:

a third transistor coupled to the first capacitor and the first transistor, wherein the third transistor is controllable by a second signal; and

a fourth transistor coupled to the second capacitor, wherein the fourth transistor is controllable by a third signal.