Semiconductor device and power conversion device
A termination structure in which a semiconductor active region is surrounded with a guard ring and capable of preventing corrosion of a metal layer connected to the guard ring includes: an active region and a guard ring region surrounding the active region. A guard ring is formed on the semiconductor substrate, and an interlayer insulating film is formed on the semiconductor substrate so as to cover the guard ring. A field plate is disposed on the interlayer insulating film and is electrically connected to the guard ring via a contact penetrating the interlayer insulating film. A protective film covers the field plate, which has a laminated structure including a first metal in contact with the guard ring and a second metal which is disposed in contact with the first metal and has a lower standard potential than the first metal.
1. A semiconductor device comprising:
an active region formed on a main surface of a semiconductor substrate; and
a guard ring region formed on the main surface so as to surround the active region, wherein
the guard ring region includes:
a guard ring formed on the semiconductor substrate,
an interlayer insulating film formed on the semiconductor substrate so as to cover the guard ring,
a field plate disposed on the interlayer insulating film and electrically connected to the guard ring via a contact penetrating the interlayer insulating film, and
a protective film covering the field plate,
the field plate has a laminated structure including a first metal in contact with the guard ring and a second metal which is disposed in contact with the first metal and has a lower standard potential than the first metal, and
a ratio of a contact area of the first metal with the protective film to a contact area of the second metal with the protective film is 0.05 or less.
2. The semiconductor device according to claim 1 , wherein
almost all of an upper surface of the first metal is covered with the second metal, and
an end portion of the first metal and an end portion of the second metal are aligned when the field plate is viewed in cross-section.
3. The semiconductor device according to claim 1 , wherein
90% or more of an area of an upper surface of the first metal is covered with the second metal.
4. The semiconductor device according to claim 1 , wherein
both ends of the field plate protrude from both ends of the guard ring when the semiconductor device is viewed in cross-section.
5. The semiconductor device according to claim 1 , wherein
a plurality of the guard rings are formed on the semiconductor substrate, and
the contact and the field plate are formed correspondingly to each of the plurality of guard rings.
6. The semiconductor device according to claim 1 , wherein
the guard ring region includes a channel stopper formed on the semiconductor substrate so as to surround the guard ring.
7. The semiconductor device according to claim 1 , further comprising
a protective film covering the field plate; wherein
the protective film is any one of an organic passivation film, an inorganic passivation film, and a laminated film in which an inorganic passivation film and an organic passivation film are laminated from a lower layer in this order.
8. The semiconductor device according to claim 1 , wherein
the second metal is an alloy containing Al as a main component, and
the first metal is any one of Mo, TiW, TiN, Ti, Co, and Ni.
9. The semiconductor device according to claim 1 , wherein
the semiconductor device is an IGBT in which a plurality of trench gates are periodically arranged in the active region.
10. A power conversion device, comprising:
a pair of DC terminals;
AC terminals of the same number as the number of AC phases; and
power conversion units of the same number as the number of AC phases, the power conversion units being connected between the pair of DC terminals, and each being configured by connecting, in series, two parallel circuits in each of which a switching element and a diode having polarity reverse to that of the switching element are connected in parallel, and interconnection points of the parallel circuits being connected to different AC terminals; wherein
the switching element is the semiconductor device according to claim 1 .