Puzzle-based pattern analysis and classification
Methods and apparatus for pattern matching and classification are disclosed. In one example of the disclosed technology, a method of performing pattern matching according to a puzzle-matching the methodology includes analyzing an original source layout pattern and determining a signature for the original source layout pattern. A target layout is scanned to search for one or more portions of the target layout that have a signature that matches or is similar to the signature of the original source pattern. Similar patterns are searched based on a signature comparison of the source pattern and the target layout. In some examples of the disclosed technology, it is possible to match partial context to the original source pattern. In some examples, matches can be made in the target layout for different orientations of layout.
1. A computing device, comprising:
a processor;
memory coupled to the processor, the memory storing computer-readable instructions that when executed by the processor, cause the processor to perform operations, the operations comprising:
decomposing a first layout of interest associated with an integrated circuit into a plurality of groups of layout patterns;
associating each of the groups of layout patterns with a canonically unique identifier so as to define a plurality of canonically unique identifiers;
storing the plurality of canonically unique identifiers in a pattern database so as to generate the pattern database;
decomposing a second layout of interest into layout sub-patterns;
identifying that at least one of the layout sub-patterns is associated with at least one of the plurality of groups of layout patterns;
identifying the canonically unique identifier for each of the identified layout sub-patterns associated with at least one of the plurality of groups of layout patterns;
using the canonically unique identifier for a respective identified layout sub-pattern, identifying a pattern defined by two or more of the layout sub-patterns associated with at least one of the plurality of groups of layout patterns, thereby performing puzzle matching;
determining a tolerance level defined by each of the identified layout sub-patterns; and
making a comparison of the respective tolerance levels to a predetermined tolerance, the predetermined tolerance indicative of whether the pattern matches a target layout.
2. The computing device as recited in claim 1 , wherein identifying the pattern further comprises searching the pattern database for layout sub-patterns nearby or adjacent to the canonically unique identifier of the respective identified layout sub-pattern.
3. The computing device as recited in claim 1 , the operations further comprising:
generating at least one signature based on the layout sub-patterns associated with at least one of the plurality of groups of layout patterns.
4. The computing device as recited in claim 3 , wherein making the comparison further comprising:
comparing at least one or more of the following: an area, a perimeter, a layer designation, a number of vertices, or an output of a Boolean operation for an identified sub-pattern and a reference sub-pattern of the target layout.
5. A method performed by a computer, the method comprising:
decomposing a first layout of interest associated with an integrated circuit into a plurality of groups of layout patterns;
associating each of the groups of layout patterns with a canonically unique identifier so as to define a plurality of canonically unique identifiers;
storing the plurality of canonically unique identifiers in a pattern database so as to generate the pattern database;
decomposing a second layout of interest into layout sub-patterns;
identifying that at least one of the layout sub-patterns is associated with at least one of the plurality of groups of layout patterns;
identifying the canonically unique identifier for each of the layout sub-patterns associated with at least one of the plurality of groups of layout patterns;
using the canonically unique identifier for a respective identified layout sub-pattern, identifying a pattern defined by two or more of the layout sub-patterns associated with at least one of the plurality of groups of layout patterns, thereby performing puzzle matching;
determining a tolerance level defined by each of the identified layout sub-patterns; and
making a comparison of the respective tolerance levels to a predetermined tolerance, the predetermined tolerance indicative of whether the pattern matches a target layout.
6. The method as recited in claim 5 , wherein identifying the pattern further comprises searching the pattern database for layout sub-patterns nearby or adjacent to the canonically unique identifier of the respective identified layout sub-pattern.
7. The method as recited in claim 5 , the method further comprising:
generating at least one signature based on the layout sub-patterns associated with at least one of the plurality of groups of layout patterns.
8. The method as recited in claim 7 , wherein making the comparison further comprising:
comparing at least one or more of the following: an area, a perimeter, a layer designation, a number of vertices, or an output of a Boolean operation for an identified sub-pattern and a reference sub-pattern of the target layout.