IMAGE SENSORS HAVING READOUT CIRCUITRY WITH A SWITCHED CAPACITOR LOW-PASS FILTER
An image sensor may include an array of imaging pixels arranged in rows and columns. Each column of imaging pixels may be coupled to a respective column output line that is used to read out samples from the imaging pixels. Each column output line may be coupled to a respective switched capacitor low-pass filter that is used to filter out high-frequency noise during readout. The switched capacitor includes a capacitor, a first transistor that is coupled between the capacitor and the column output line, and a second transistor that is coupled between the capacitor and an additional capacitor. The first and second transistors are repeatedly, alternatingly asserted at a frequency that is selected based on a target cutoff frequency for the low-pass filter.
1 . An image sensor, comprising:
an array of imaging pixels;
a column output line coupled to a column of the imaging pixels; and
a switched capacitor low-pass filter coupled to the column output line.
2 . The image sensor defined in claim 1 , further comprising:
a capacitor, wherein the switched capacitor low-pass filter is coupled between the capacitor and the column output line.
3 . The image sensor defined in claim 1 , wherein the capacitor is a first capacitor and wherein the switched capacitor low-pass filter comprises a second capacitor.
4 . The image sensor defined in claim 3 , wherein a capacitance of the first capacitor is greater than a capacitance of the second capacitor.
5 . The image sensor defined in claim 3 , wherein a capacitance of the first capacitor is at least ten times greater than a capacitance of the second capacitor.
6 . The image sensor defined in claim 3 , wherein the switched capacitor low-pass filter comprises a first transistor that is coupled between the second capacitor and the column output line.
7 . The image sensor defined in claim 6 , wherein the switched capacitor low-pass filter comprises a second transistor that is coupled between the second capacitor and the first capacitor.
8 . The image sensor defined in claim 7 , wherein the first and second transistors are configured to be repeatedly, alternatingly asserted during a readout period.
9 . The image sensor defined in claim 7 , wherein the first and second transistors are configured to be repeatedly asserted in a non-overlapping manner.
10 . The image sensor defined in claim 9 , wherein the first and second transistors are configured to be repeatedly asserted in the non-overlapping manner at a frequency and wherein the frequency is greater than or equal to 1 MHz.
11 . The image sensor defined in claim 9 , wherein the first and second transistors are configured to be repeatedly asserted in the non-overlapping manner at a frequency and wherein the frequency is greater than or equal to 10 MHz.
12 . The image sensor defined in claim 9 , wherein the first and second transistors are configured to be repeatedly asserted in the non-overlapping manner at a frequency and wherein the frequency is between 1 MHz and 100 MHz.
13 . An image sensor, comprising:
an array of imaging pixels;
a column output line coupled to a column of the imaging pixels;
a first capacitor;
a first transistor that is coupled between the first capacitor and the column output line;
a second capacitor; and
a second transistor that is coupled between the first and second capacitors, wherein the first and second transistors are configured to be repeatedly, alternatingly asserted during a readout period.
14 . The image sensor defined in claim 13 , wherein a capacitance of the second capacitor is greater than a capacitance of the first capacitor.
15 . The image sensor defined in claim 13 , wherein the first and second transistors are configured to be repeatedly, alternatingly asserted during the readout period at a frequency that is greater than or equal to 1 MHz.
16 . The image sensor defined in claim 13 , wherein the first and second transistors are configured to be repeatedly, alternatingly asserted during the readout period at a frequency that is between 1 MHz and 100 MHz.
17 . An image sensor, comprising:
an array of imaging pixels;
a plurality of column lines, wherein each column line is configured to receive outputs from a respective column of the imaging pixels; and
a plurality of switched capacitor low-pass filters, wherein each column line is coupled to a respective switched capacitor low-pass filter.
18 . The image sensor defined in claim 17 , wherein each switched capacitor low-pass filter comprises:
a first capacitor;
a first transistor that is coupled between the first capacitor and the respective column output line; and
a second transistor that is coupled to the first capacitor.
19 . The image sensor defined in claim 18 , further comprising:
control circuitry configured to alternate asserting the first and second transistors of each switched capacitor low-pass filter.
20 . The image sensor defined in claim 19 , wherein the control circuitry is configured to alternate asserting the first and second transistors of each switched capacitor low-pass filter at a frequency that is greater than 1 MHz.