Operation method for a memory device
An operation method for a memory device is provided. The operation method includes: increasing a dummy word line voltage to a first dummy word line voltage during a pre-tum on period; increasing the dummy word line voltage from the first dummy word line voltage to a second dummy word line voltage during a read period; and lowering the dummy word line voltage after the read period is finished. Wherein the first dummy word line voltage is lower than the second dummy word line voltage.
1. An operation method for a memory device, the operation method including:
increasing a dummy word line voltage to a first dummy word line voltage during a pre-turn on period;
increasing the dummy word line voltage from the first dummy word line voltage to a second dummy word line voltage during a read period; and
lowering the dummy word line voltage after the read period is finished,
wherein the first dummy word line voltage is lower than the second dummy word line voltage; and the second dummy word line voltage is corresponding to a pass voltage.
2. The operation method according to claim 1 , wherein the first dummy word line voltage and the second dummy word line voltage are applied to each of a plurality of dummy word lines of the memory device, and the dummy word lines are on adjacent sides of a plurality of word lines of the memory device.
3. The operation method according to claim 1 , wherein a plurality of dummy word lines of the memory device are applied by different first dummy word line voltages and different second dummy word line voltages.
4. The operation method according to claim 1 , wherein the first dummy word line voltage and the second dummy word line voltage are applied to at least one adjacent dummy word line among a plurality of dummy word lines of the memory device, the at least one adjacent dummy word line is adjacent to at least one select line.
5. The operation method according to claim 1 , wherein the first dummy word line voltage is higher than a threshold voltage of a plurality of memory cells on a plurality of dummy word lines of the memory device.
6. The operation method according to claim 1 , further including
increasing a string select line voltage of at least one unselected sub-block to a first string select line voltage during the pre-turn on period;
lowering the string select line voltage of the at least one unselected sub-block from the first string select line voltage to a second string select line voltage when the pre-turn on period is finished, the first string select line voltage is higher than the second string select line voltage; and
lowering the string select line voltage of the at least one unselected sub-block from the second string select line voltage.
7. The operation method according to claim 6 , wherein
the string select line voltage is applied to a plurality of string select lines of the memory device;
the first string select line voltage is higher than a threshold voltage of a plurality of memory cells on the plurality of string select lines of the memory device; and
the second string select line voltage is lower than the threshold voltage of the plurality of memory cells on the plurality of string select lines of the memory device.