IP Library Granted Patent US 11,726,874
Granted Patent B2
US 11,726,874 · App. 17/249,399 · Granted Aug 15, 2023

Storing critical data at a memory system

Inventors: Vamsi Rayaprolu (San Jose, CA); Sivagnanam Parthasarathy (Carlsbad, CA); Sampath K. Ratnam (Boise, ID); Peter Feeley (Boise, ID); Kishore Kumar Muchherla (Fremont, CA)
Assignee: Micron Technology, Inc.
G06F11/1076G06F3/064G06F3/0619G06F3/0673G06F11/1004G06F11/1012
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Quick Facts
Patent No.
US 11,726,874
App. No.
17/249,399
Granted
Aug 15, 2023
Kind
B2
Abstract

A request to retrieve user data stored at a memory device is received and a first error control operation associated with the user data is performed. An indication of a failure of the first error control operation is received, and in response, a subset of system data stored at the memory device is identified. A second error control operation is performed on the subset of the system data to retrieve the subset of the system data stored at the memory device, and the user data is read by using the subset of the system data retrieved based on the performing of the second error control operation.

Claims (55)

1. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to perform operations comprising:

receiving a request to retrieve user data stored at the memory device;

performing a first error control operation associated with the user data;

receiving an indication of a failure of the first error control operation;

in response to receiving the indication of the failure of the first error control operation, identifying a subset of system data stored at the memory device;

performing a second error control operation on the subset of the system data to retrieve the subset of the system data stored at the memory device; and

reading the user data by using the subset of the system data retrieved based on the performing of the second error control operation.

2. The system of claim 1 , wherein the processing device is to perform operations further comprising:

adjusting a read operation parameter based on the subset of the system data that is retrieved based on the performance of the second error control operation;

retrieving the user data based on the adjusted read operation parameter; and

performing the first error control operation on the retrieved user data that is retrieved based on the adjusted read operation parameter.

3. The system of claim 1 , wherein reading the user data by using the subset of the system data retrieved based on the performing of the second error control operation comprises:

identifying a logical block address associated with the user data; and

determining whether data assigned to the logical block address is valid, wherein the user data is read when the data assigned to the logical block address is valid.

4. The system of claim 1 , wherein the first error control operation is based on an error-correcting code (ECC).

5. The system of claim 1 , wherein the second error control operation is based on a cyclic redundancy check (CRC).

6. The system of claim 1 , wherein the subset of the system data identifies a write temperature at a time when the user data is stored.

7. The system of claim 1 , wherein performing the first error control operation associated with the user data comprises identifying a system data that corresponds to the user data, wherein the first error control operation is performed with the system data that corresponds to the user data.

8. A method comprising:

receiving a request to retrieve user data stored at a memory device;

performing a first error control operation associated with the user data;

receiving an indication of a failure of the first error control operation;

in response to receiving the indication of the failure of the first error control operation, identifying a subset of system data stored at the memory device;

performing a second error control operation on the subset of the system data to retrieve the subset of the system data stored at the memory device; and

reading the user data by using the subset of the system data retrieved based on the performing of the second error control operation.

9. The method of claim 8 , further comprising:

adjusting a read operation parameter based on the subset of the system data that is retrieved based on the performance of the second error control operation;

retrieving the user data based on the adjusted read operation parameter; and

performing the first error control operation on the retrieved user data that is retrieved based on the adjusted read operation parameter.

10. The method of claim 8 , wherein reading the user data by using the subset of the system data retrieved based on the performing of the second error control operation comprises:

identifying a logical block address associated with the user data; and

determining whether data assigned to the logical block address is valid, wherein the user data is read when the data assigned to the logical block address is valid.

11. The method of claim 8 , wherein the first error control operation is based on an error-correcting code (ECC).

12. The method of claim 8 , wherein the second error control operation is based on a cyclic redundancy check (CRC).

13. The method of claim 8 , wherein the subset of the system data identifies a write temperature at a time when the user data is stored.

14. The method of claim 8 , wherein performing the first error control operation associated with the user data comprises identifying a system data that corresponds to the user data, wherein the first error control operation is performed with the system data that corresponds to the user data.

15. A non-transitory computer readable storage medium comprising instructions, which when executed by a processing device, cause the processing device to perform operations comprising:

receiving a request to retrieve user data stored at a memory device;

performing a first error control operation associated with the user data;

receiving an indication of a failure of the first error control operation;

in response to receiving the indication of the failure of the first error control operation, identifying a subset of system data stored at the memory device;

performing a second error control operation on the subset of the system data to retrieve the subset of the system data stored at the memory device; and

reading the user data by using the subset of the system data retrieved based on the performing of the second error control operation.

16. The non-transitory computer readable storage medium of claim 15 , wherein the processing device is to perform operations further comprising:

adjusting a read operation parameter based on the subset of the system data that is retrieved based on the performance of the second error control operation;

retrieving the user data based on the adjusted read operation parameter; and

performing the first error control operation on the retrieved user data that is retrieved based on the adjusted read operation parameter.

17. The non-transitory computer readable storage medium of claim 15 , wherein reading the user data by using the subset of the system data retrieved based on the performing of the second error control operation comprises:

identifying a logical block address associated with the user data; and

determining whether data assigned to the logical block address is valid, wherein the user data is read when the data assigned to the logical block address is valid.

18. The non-transitory computer readable storage medium of claim 15 , wherein the first error control operation is based on an error-correcting code (ECC) and the second error control operation is based on a cyclic redundancy check (CRC).

19. The non-transitory computer readable storage medium of claim 15 , wherein the subset of the system data identifies a write temperature at a time when the user data is stored.

20. The non-transitory computer readable storage medium of claim 15 , wherein performing the first error control operation associated with the user data comprises identifying a system data that corresponds to the user data, wherein the first error control operation is performed with the system data that corresponds to the user data.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 1, 2021
From: RAYAPROLU, VAMSI; PARTHASARATHY, SIVAGNANAM; RATNAM, SAMPATH K.; FEELEY, PETER; MUCHHERLA, KISHORE KUMAR
To: MICRON TECHNOLOGY, INC.
Reel/Frame 055449/0761 →
Continuity (3)
Division 16029331 · Jul 6, 2018
Provisional Application 62621502 · Jan 24, 2018
Related Publication 20210191816A1 · Jun 24, 2021