Systems and methods for mitigating global event power surge in image sensors
An image sensor may include a pixel array, row control circuitry, and column readout circuitry. The row control circuitry may operate the pixel array in a global shutter mode of operation. In particular, timing control circuitry may provide global timing clock signals associated with a global photodiode reset event and a global photodiode charge transfer event to row driver circuitry providing control signals to each row in the array. Each driver circuitry may include a time delay circuit that delays the global timing clock signal by different amounts across the rows. Therefore, these global events may be offset on a per-row or per-row group basis, thereby mitigating power surges associated with global events. Further, by offsetting the global photodiode reset and charge transfer events using the same delay for a given row, the same global integration time may be preserved across different rows.
1. An image sensor comprising:
an image sensor pixel array; and
row control circuitry coupled to the image sensor pixel array, the row control circuitry including:
a first control signal driver circuit coupled to a pixel row in the image sensor pixel array;
a second control signal driver circuit coupled to the pixel row;
timing control circuitry coupled to the first and second control signal driver circuits; and
a time delay circuit coupled between the first control signal driver circuit and the timing control circuitry and coupled between the second control signal driver circuit and the timing control circuitry, wherein the time delay circuit receives a global timing control signal as a first input and a clock signal as a second input and outputs a delayed version of the global timing control signal by introducing a time delay to the global timing control signal and wherein the first control signal driver circuit receives the delayed version of the global timing control signal.
2. The image sensor defined in claim 1 , wherein the row control circuitry includes delay programming circuitry coupled to the time delay circuit.
3. The image sensor defined in claim 2 , wherein the time delay circuit is associated with the pixel row, and the row control circuitry includes an additional time delay circuit associated with an additional pixel row in the image sensor pixel array and coupled to the delay programming circuitry.
4. The image sensor defined in claim 3 , wherein the row control circuitry includes a third control signal driver circuit coupled to the additional pixel row, and the additional time delay circuit is coupled between the third control signal driver circuit and the timing control circuitry.
5. The image sensor defined in claim 4 , wherein the first and third control signal driver circuits are configured to provide photodiode reset control signals to the pixel row and the additional pixel row.
6. The image sensor defined in claim 5 , wherein the delay programming circuitry provides an indication for the time delay to the time delay circuit and provides an indication for an additional time delay to the additional time delay circuit.
7. The image sensor defined in claim 6 , wherein the timing control circuitry is configured to provide the global timing control signal, the time delay circuit is configured to provide the delayed version of the global timing control signal delayed by the time delay to the first control signal driver circuit, and the additional time delay circuit is configured to provide a second version of the global timing control signal delayed by the additional time delay.
8. The image sensor defined in claim 1 , wherein the image sensor pixel array comprises pixels operable in a global shutter mode operation.
9. The image sensor defined in claim 1 , wherein the first control signal driver circuit is configured to provide a photodiode reset signal to the pixel row, and the second control signal driver circuit is configured to provide a photodiode charge transfer signal to the pixel row.
10. The image sensor defined in claim 1 , wherein the global timing control signal is a global photodiode reset timing control signal.
11. The image sensor defined in claim 1 , wherein the global timing control signal is a global photodiode charge transfer timing control signal.
12. An image sensor comprising:
an image sensor pixel array; and
row control circuitry coupled to the image sensor pixel array and configured to operate pixels in the image sensor pixel array in a global shutter mode of operation, the row control circuitry including:
delay programming circuitry;
first row driver circuitry coupled to a first pixel row in the image sensor pixel array and having a first delay circuit coupled to the delay programming circuitry, wherein the first row driver circuitry is configured to operate the first pixel row with a first global integration time period;
second row driver circuitry coupled to a second pixel row in the image sensor pixel array and having a second delay circuit coupled to the delay programming circuitry, wherein the second row driver circuitry is configured to operate the second pixel row with a second global integration time period that temporally overlaps and is temporally offset from the first global integration time period and wherein the first and second global integration time periods have a same time duration; and
timing control circuitry coupled to the first row driver circuitry and the second row driver circuitry.
13. The image sensor defined in claim 12 , wherein timing control circuitry is configured to provide a global timing control signal associated with the global shutter mode of operation to the first row driver circuitry and to the second row driver circuitry.
14. The image sensor defined in claim 13 , wherein the delay programing circuitry provides a first signal indicative of a first time delay to the first delay circuit and provides a second signal indicative of a second time delay to the second delay circuit.
15. The image sensor defined in claim 14 , wherein the first delay circuit is configured to delay the global timing control signal by the first time delay, and the second delay circuit is configured to delay the global timing control signal by the second time delay.
16. The image sensor defined in claim 12 , wherein the delay programming circuitry is configured to supply the first and second delay circuits respectively with first and second time delays as part of a regular pattern.
17. The image sensor defined in claim 12 , wherein the delay programming circuitry is configured to supply the first and second delay circuits respectively with first and second time delays in a randomized manner.
18. An image sensor comprising:
an image sensor pixel array; and
row control circuitry coupled to the image sensor pixel array, the row control circuitry including:
a control signal driver circuit configured to provide a control signal to a pixel row in the image sensor pixel array;
timing control circuitry configured to provide a global timing control signal; and
a time delay circuit configured to receive the global timing control signal and to provide a delayed version of the global timing control signal to the control signal driver circuit, wherein the time delay circuit includes:
a clocked delay line that generates a plurality of outputs associated with a respective plurality of time delays, and
multiplexer circuitry coupled to the clocked delay line and configured to provide the delayed version of the global timing control signal to the control signal driver circuit by passing one of the plurality of outputs.
19. The image sensor defined in claim 1 , wherein a duration of the time delay is dependent upon a property of the clock signal.
20. The image sensor defined in claim 12 , wherein the second global integration time period is temporally offset from the first global integration time period by an offset time delay less than two percent of the time duration.