IP Library Granted Patent US 12,010,876
Granted Patent B2
US 12,010,876 · App. 17/252,427 · Granted Jun 11, 2024

Display substrate and manufacturing method thereof, and display device

Inventors: Xin Zhang (Beijing, CN); Yang Zhou (Beijing, CN); Yupeng He (Beijing, CN); Xiaofeng Jiang (Beijing, CN); Meng Zhang (Beijing, CN); Lu Bai (Beijing, CN); Yi Qu (Beijing, CN); Huijun Li (Beijing, CN); Lulu Yang (Beijing, CN); Pengfei Yu (Beijing, CN); Hao Zhang (Beijing, CN); Mengqi Wang (Beijing, CN)
Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd.; BOE TECHNOLOGY GROUP CO., LTD.
H10K59/122H10K50/844H10K59/131
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Quick Facts
Patent No.
US 12,010,876
App. No.
17/252,427
Granted
Jun 11, 2024
Kind
B2
Abstract

Provided are a display substrate and a manufacturing method thereof, and a display device. The display substrate includes: a base substrate; a drive circuit layer formed on the base substrate and including an interlayer dielectric layer at the display region and the transition region; display parts at the display region, including a first electrode and a pixel definition portion sequentially formed on the interlayer dielectric layer; a first packaging dam and a second packaging dam at the transition region and around the opened region, each including a protective portion and a blocking portion sequentially laminated on the interlayer dielectric layer. The second packaging dam is at a side of the first packaging dam away from the display region, and a thickness of the second packaging dam is greater than that of the first packaging dam.

Claims (35)

1. A display substrate comprising a display area, an opening area, and a transition area between the display area and the opening area, the transition area being disposed around the opening area; wherein the display substrate comprises:

a base substrate;

a drive circuit layer formed on the base substrate, and comprising an interlayer dielectric layer at the display area and the transition area;

display parts located at the display area, and comprising a first electrode and a pixel definition portion sequentially formed on the interlayer dielectric layer;

a first packaging dam located at the transition area and disposed around the opening area, wherein the first packaging dam comprises a first protective portion and a first blocking portion sequentially laminated on the interlayer dielectric layer;

a second packaging dam located at the transition area and disposed around the opening area, wherein the second packaging dam is at a side of the first packaging dam far away from the display area, a thickness of the second packaging dam is greater than a thickness of the first packaging dam, and the second packaging dam comprises a second protective portion and a second blocking portion sequentially laminated on the interlayer dielectric layer; wherein

the first blocking portion, the second blocking portion, and the pixel definition portion are arranged on the same layer, and are disconnected from each other;

a distance between the first packaging dam and the second packaging dam is less than a distance between the first packaging dam and the display area;

at least one of the first packaging dam and the second packaging dam further comprises a photo spacer formed at a side of the first blocking portion or the second blocking portion back away from the interlayer dielectric layer; and

the display parts further comprise a supporting portion formed at a side of the pixel definition portion back away from the base substrate, the supporting portion and the photo spacer are arranged on the same layer.

2. The display substrate of claim 1 , wherein a thickness of the second protective portion is greater than a thickness of the first protective portion.

3. The display substrate of claim 2 , wherein the first protective portion and the first electrode are arranged on the same layer, and are disconnected from each other.

4. The display substrate of claim 2 , further comprising a planarization portion located at the display area and formed between the interlayer dielectric layer and the first electrode;

wherein the first protective portion and the planarization portion are arranged on the same layer, and are disconnected from each other.

5. The display substrate of claim 3 , wherein the second protective portion and the first protective portion are arranged on the same layer.

6. The display substrate of claim 3 , further comprising a planarization portion located at the display area and formed between the interlayer dielectric layer and the first electrode;

wherein the second protective portion and the planarization portion are arranged on the same layer, and are disconnected from each other.

7. The display substrate of claim 1 , further comprising:

an isolation area between the display area and the transition area, the isolation area being disposed around the transition area; and

an isolation column formed at a side of the interlayer dielectric layer back away from the base substrate and located at the isolation area, wherein the isolation column is disposed around the first packaging dam, and the isolation column is provided with a groove at a sidewall thereof.

8. The display substrate of claim 7 , wherein the drive circuit layer comprises a thin film transistor at the display area, a source electrode and a drain electrode of the thin film transistor and the isolation column are arranged on the same layer, and are disconnected from each other.

9. The display substrate of claim 8 , further comprising an inner-ring wiring area between the isolation area and the display area, the inner-ring wiring area being disposed around the isolation area;

wherein the drive circuit layer further comprises an inner-ring signal line at the inner-ring wiring area, wherein the inner-ring signal line is electrically connected to a signal wiring of the display area.

10. The display substrate of claim 8 , wherein the isolation column comprises a first metal layer, a second metal layer, and a third metal layer sequentially laminated on the interlayer dielectric layer, an outer boundary of an orthographic projection of the second metal layer on the interlayer dielectric layer is inside an outer boundary of orthographic projections of the first metal layer and the third metal layer on the interlayer dielectric layer, to form the groove at the sidewall of the isolation column.

11. The display substrate of claim 10 , wherein the first metal layer and the third metal layer are titanium layers, and the second metal layer is an aluminum layer.

12. The display substrate of claim 7 , wherein the drive circuit layer comprises a first slot and a second slot at the isolation area; wherein the first slot is at a side of the isolation column close to the first packaging dam, and the first slot is disposed around the first packaging dam; the second slot is at a side of the isolation column close to the display area, and the second slot is disposed around the first slot;

wherein the first slot and the second slot penetrate through the drive circuit layer.

13. The display substrate of claim 1 , wherein the display substrate further comprises a packaging layer comprising a first inorganic packaging film layer, an organic packaging film layer, and a second inorganic packaging film layer that are sequentially laminated;

the first inorganic packaging film layer and the second inorganic packaging film layer are configured to package the first packaging dam, the second packaging dam, and the display parts;

the organic packaging film layer is configured to package the display parts, and configured to be interrupted at a side of the first packaging dam close to the display area.

14. A display device comprising the display substrate of claim 1 .

15. The display substrate of claim 1 , wherein the distance between the first packaging dam and the second packaging dam is less than a distance between the second packaging dam and the opening area.

16. The display substrate of claim 1 , wherein a surface roughness of the interlayer dielectric layer covered with the second protective portion is greater than a surface roughness of the interlayer dielectric layer uncovered with the second protective portion.

17. The display substrate of claim 1 , further comprising a peripheral packaging area having a first peripheral packaging dam and a second peripheral packaging dam, wherein a thickness difference between the second peripheral packaging dam and the first peripheral packaging dam is greater than a thickness difference between the second packaging dam and the first packaging dam.

18. The display substrate of claim 1 , wherein an inclination angle between the second packaging dam and the interlayer dielectric layer is greater than an inclination angle between the first packaging dam and the interlayer dielectric layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2020
From: ZHANG, XIN; ZHOU, YANG; HE, YUPENG; JIANG, XIAOFENG; ZHANG, MENG; BAI, LU; QU, YI; LI, HUIJUN; YANG, LULU; YU, PENGFEI; ZHANG, HAO; WANG, MENGQI
To: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 054762/0251 →
Continuity (1)
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