IP Library › Granted Patent US 12,154,952
Granted Patent B2
US 12,154,952 · App. 17/272,873 · Granted Nov 26, 2024

Laminate, semiconductor device, and method for manufacturing laminate

Inventor: Hiroshi Hashigami (Annaka, JP)
Assignee: SHIN-ETSU CHEMICAL CO., LTD.
H01L29/2206C01G15/006H01L21/0242H01L21/02433H01L21/02483H01L21/02496H01L29/78H01L21/0262H01L29/7395H01L29/7786
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Quick Facts
Patent No.
US 12,154,952
App. No.
17/272,873
Granted
Nov 26, 2024
Kind
B2
Abstract

The present invention is a laminate including: a crystal substrate; a middle layer formed on a main surface of the crystal substrate, the middle layer containing a mixture of an amorphous region in an amorphous phase and a crystal region in a crystal phase having a corundum structure mainly made of a first metal oxide; and a crystal layer formed on the middle layer and having a corundum structure mainly made of a second metal oxide. Thus, provided is a laminate having high-quality corundum-structured crystal with sufficiently suppressed crystal defects.

Claims (25)

1. A laminate comprising:

a crystal substrate;

a middle layer formed on a main surface of the crystal substrate, the middle layer comprising silicon and a mixture of an amorphous region in an amorphous phase mainly made of a first metal oxide and a crystal region in a crystal phase having a corundum structure mainly made of the first metal oxide; and

a crystal layer formed on the middle layer and having a corundum structure mainly made of a second metal oxide.

2. The laminate according to claim 1 , wherein the crystal region is an epitaxially grown layer from a crystal plane of the crystal substrate.

3. The laminate according to claim 1 , wherein the middle layer comprises the crystal region in a proportion of 1% or more in an arbitrary cross section of the middle layer which is cut perpendicularly to the main surface of the crystal substrate.

4. The laminate according to claim 1 , wherein the middle layer comprises the crystal region in a proportion of 4% or more and 25% or less in an arbitrary cross section of the middle layer which is cut perpendicularly to the main surface of the crystal substrate.

5. The laminate according to claim 1 , wherein the middle layer has a thickness of 1 nm or more.

6. The laminate according to claim 1 , wherein the middle layer has a thickness of 10 nm or more.

7. The laminate according to claim 1 , wherein the first metal oxide mainly comprises an oxide containing any of aluminum, titanium, vanadium, chromium, iron, gallium, rhodium, indium, and iridium.

8. The laminate according to claim 1 , wherein the second metal oxide mainly comprises an oxide containing any of aluminum, titanium, vanadium, chromium, iron, gallium, rhodium, indium, and iridium.

9. The laminate according to claim 1 , wherein a silicon concentration in the middle layer is 0.5 at % or more.

10. The laminate according to claim 1 , wherein a silicon concentration in the middle layer is 1 at % or more and 10 at % or less.

11. The laminate according to claim 1 , further comprising a stress relief layer between the crystal substrate and the middle layer.

12. A semiconductor device comprising at least a semiconductor layer and an electrode, wherein

the semiconductor layer comprises at least a portion of the laminate according to claim 1 .

13. The laminate according to claim 1 , wherein the crystal region and the amorphous region have the same composition.

14. A method for manufacturing a laminate, comprising steps of:

forming a first mixture gas in which an atomized first metal oxide precursor, a carrier gas, and silicon are mixed;

forming a middle layer by supplying the first mixture gas onto a heated crystal substrate, wherein the middle layer contains a mixture of an amorphous region in an amorphous phase and a crystal region in a crystal phase having a corundum structure mainly made of a first metal oxide;

forming a second mixture gas in which an atomized second metal oxide precursor and a carrier gas are mixed; and

forming a crystal layer on the middle layer by supplying the second mixture gas onto the heated crystal substrate, wherein the crystal layer has a corundum structure mainly made of a second metal oxide.

15. The method for manufacturing a laminate according to claim 14 , wherein in the step of forming the first mixture gas, the silicon is added while the atomized first metal oxide precursor and the carrier gas are being conveyed toward the crystal substrate.

16. The method for manufacturing a laminate according to claim 15 , wherein the silicon is added while the atomized first metal oxide precursor and the carrier gas are conveyed through a pipe made of a silicone resin.

17. The method for manufacturing a laminate according to claim 14 , wherein in the step of forming the middle layer, supply amount of the first mixture gas is changed.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2021
From: HASHIGAMI, HIROSHI
To: SHIN-ETSU CHEMICAL CO., LTD.
Reel/Frame 055462/0737 →
Priority Claims (1)
JP 2018-182714 · Sep 27, 2018 · national
Continuity (1)
Related Publication 20210313433A1 · Oct 7, 2021