Solid-state imaging device and imaging device
View Patent ↗An imaging device includes a photoelectric conversion region that converts incident light into electric charge. The imaging device includes a first readout circuit coupled to the photoelectric conversion region at a first location, and a second readout circuit including a portion coupled to the photoelectric conversion region at a second location. The second readout circuit is configured to control the first readout circuit. The first location and the second location are on a same side of the photoelectric conversion region.
1. An imaging device, comprising:
a photoelectric conversion region that converts incident light into electric charges;
a first readout circuit coupled to the photoelectric conversion region at a first location; and
a second readout circuit including a portion coupled to the photoelectric conversion region at a second location, the second readout circuit being configured to control the first readout circuit,
wherein the first location and the second location are on a same side of the photoelectric conversion region,
wherein the first readout circuit includes a first transistor having a first gate at the first location and a plurality of third transistors coupled to the first transistor,
wherein gates of the plurality of third transistors are linearly arranged in a line disposed in parallel to a row direction extending away from a first corner portion of the photoelectric conversion region,
wherein the second readout circuit includes a second transistor having a second gate at the second location and a plurality of fourth transistors coupled to the second transistor, and
wherein gates of the plurality of fourth transistors are linearly arranged in a line disposed in parallel to a row direction extending away from a second corner portion of the photoelectric conversion region.
2. The imaging device of claim 1 , wherein the plurality of third transistors includes a reset transistor, an amplification transistor, and a selection transistor.
3. The imaging device of claim 2 , wherein a diffusion region is provided between the gates of each of the reset transistor, the amplification transistor, and the selection transistor.
4. The imaging device of claim 2 , wherein a gate insulating film is provided between the gates of each of the reset transistor, the amplification transistor, and the selection transistor.
5. The imaging device of claim 1 , wherein the first transistor includes a transmission transistor.
6. The imaging device of claim 1 wherein the second transistor includes an overflow gate transistor.
7. The imaging device of claim 1 , wherein the plurality of fourth transistors includes a plurality of log transistors.
8. The imaging device of claim 7 , wherein a diffusion region is provided between the gates of each of the plurality of log transistors.
9. The imaging device of claim 8 , further comprising plurality of fifth transistors including gates that are arranged in parallel to the gates of the plurality of the log transistors.
10. The imaging device of claim 9 , further comprising a diffusion region provided between gates of each of the plurality of fifth transistors.
11. An imaging device, comprising:
a photoelectric conversion region that converts incident light into electric charges;
a first readout circuit coupled to the photoelectric conversion region at a first location; and
a second readout circuit including a portion coupled to the photoelectric conversion region at a second location, the second readout circuit being configured to control the first readout circuit,
wherein the first location and the second location are on a same side of the photoelectric conversion region,
wherein the first readout circuit includes a first transistor having a first gate at the first location and a plurality of third transistors coupled to the first transistor,
wherein gates of the plurality of third transistors are linearly arranged in a line disposed in parallel to a row direction extending towards a first corner portion of the photoelectric conversion region and provided under the photoelectric conversion region in a cross-sectional view,
wherein the second readout circuit includes a second transistor having a second gate at the second location and a plurality of fourth transistors coupled to the second transistor, and
wherein gates of the plurality of fourth transistors are linearly arranged in a line disposed in parallel to a row direction extending towards a second corner portion of the photoelectric conversion region, and provided under the photoelectric conversion region in the cross-sectional view.
12. The imaging device of claim 11 , wherein the plurality of third transistors includes a reset transistor, an amplification transistor, and a selection transistor.
13. The imaging device of claim 12 , wherein a diffusion region is provided between the gates of each of the reset transistor, the amplification transistor, and the selection transistor.
14. The imaging device of claim 12 , wherein a gate insulating film is provided between the gates of each of the reset transistor, the amplification transistor, and the selection transistor.
15. The imaging device of claim 11 , wherein the first transistor includes a transmission transistor.
16. The imaging device of claim 11 wherein the second transistor includes an overflow gate transistor.
17. The imaging device of claim 11 , wherein the plurality of fourth transistors includes a plurality of log transistors.
18. The imaging device of claim 17 , wherein a diffusion region is provided between the gates of each of the plurality of log transistors.
19. The imaging device of claim 18 , further comprising plurality of fifth transistors including gates that are arranged in parallel to the gates of the plurality of the log transistors.
20. The imaging device of claim 19 , further comprising a diffusion region provided between gates of each of the plurality of fifth transistors.