Solid-state imaging element, solid-state imaging element package, and electronic equipment
The present technology relates to a solid-state imaging element, a solid-state imaging element package, and electronic equipment that can suppress occurrence of flares. The solid-state imaging element includes an effective pixel region and a peripheral circuit region. The effective pixel region includes a plurality of pixels arranged two-dimensionally in a matrix pattern. The peripheral circuit region is provided around the effective pixel region. The effective pixel region has a pixel-to-pixel light-shielding film formed at boundary portions between the pixels. In a region on a substrate where a rib structure is formed within the peripheral circuit region, no light-shielding film is formed in the same layer as the pixel-to-pixel light-shielding film. The present technology is applicable, for example, to a solid-state imaging element package including a cover glass that protects a light-receiving surface of the solid-state imaging element.
1. A solid-state imaging element, comprising:
an effective pixel region having a plurality of pixels arranged two-dimensionally in a matrix pattern; and
a peripheral circuit region provided around the effective pixel region, wherein
the effective pixel region has a pixel-to-pixel light-shielding film formed at boundary portions between the pixels, and,
in a region on a substrate where a rib structure is formed within the peripheral circuit region, no light-shielding film is formed in a same layer as the pixel-to-pixel light-shielding film.
2. The solid-state imaging element of claim 1 , wherein
the rib structure is a structure that supports a transparent substrate.
3. The solid-state imaging element of claim 1 , wherein
the rib structure includes a resin material having an attenuation coefficient.
4. The solid-state imaging element of claim 1 , further comprising:
an OPB pixel region between the effective pixel region and the peripheral circuit region, wherein
a light-shielding film is formed in the same layer as the pixel-to-pixel light-shielding film in the OPB pixel region.
5. The solid-state imaging element of claim 1 , wherein
at least two semiconductor substrates are pasted together to form the solid-state imaging element.
6. The solid-state imaging element of claim 5 , wherein
a first semiconductor substrate having the rib structure is formed thereon,
a second semiconductor substrate having circuitry that acts as floating nodes during a charge accumulation period is formed thereon, the first and second semiconductor substrates being pasted together, and
the circuitry is formed in a region more inward than a region where the rib structure is formed on the first semiconductor substrate.
7. The solid-state imaging element of claim 1 ,
wherein the solid-state imaging element is a back-illuminated solid-state imaging element.
8. The solid-state imaging element of claim 1 , wherein
the solid-state imaging element has a construction with a single semiconductor substrate.
9. The solid-state imaging element of claim 1 , further comprising:
a multi-layer interconnect layer including a plurality of interconnect layers and an interlayer insulating film, wherein
at least part of the interlayer insulating film includes a porous low-k material.
10. A solid-state imaging element package, comprising:
a solid-state imaging element;
a transparent substrate adapted to protect the solid-state imaging element; and
a rib structure formed on a substrate of the solid-state imaging element to support the transparent substrate,
the solid-state imaging element including
an effective pixel region having a pixel-to-pixel light-shielding film formed at boundary portions between the pixels, and
a peripheral circuit region provided around the effective pixel region, wherein,
in a region on the substrate where the rib structure is formed within the peripheral circuit region, no light-shielding film is formed in a same layer as the pixel-to-pixel light-shielding film.
11. The solid-state imaging element package of claim 10 , wherein
a bonding wire connected to a pad of the solid-state imaging element is disposed in such a manner as to penetrate the rib structure.
12. The solid-state imaging element package of claim 10 , wherein
a pad formed on the solid-state imaging element and the rib structure are disposed side by side in a planar direction, and
the pad is disposed more on a side of a periphery than the rib structure.
13. The solid-state imaging element package of claim 10 , wherein
the solid-state imaging element package is formed as a WL-CSP.
14. The solid-state imaging element package of claim 10 , wherein
the solid-state imaging element has a laminated construction including at least two semiconductor substrates pasted together.
15. The solid-state imaging element package of claim 14 , wherein
a first semiconductor substrate having the rib structure is formed thereon,
a second semiconductor substrate having circuitry that acts as floating nodes during a charge accumulation period is formed thereon, the first and second semiconductor substrates being pasted together, and
the circuitry is formed in a region more inward than a region where the rib structure is formed on the first semiconductor substrate.
16. The solid-state imaging element package of claim 10 , wherein
the solid-state imaging element is a back-illuminated solid-state imaging element.
17. The solid-state imaging element package of claim 10 , wherein
the solid-state imaging element has a construction with a single semiconductor substrate.
18. The solid-state imaging element package of claim 10 , further comprising:
a multi-layer interconnect layer including a plurality of interconnect layers and an interlayer insulating film, wherein,
at least part of the interlayer insulating film includes a porous low-k material.
19. Electronic equipment comprising:
a solid-state imaging element including
an effective pixel region having a plurality of pixels arranged two-dimensionally in a matrix pattern, and
a peripheral circuit region provided around the effective pixel region,
the effective pixel region having a pixel-to-pixel light-shielding film formed at boundary portions between the pixels,
in a region on a substrate where a rib structure is formed within the peripheral circuit region, no light-shielding film being formed in a same layer as the pixel-to-pixel light-shielding film.