Live offset cancellation of the decision feedback equalization data slicers
A receiver utilizes loop-unrolled decision feedback equalization (DFE). For each sample, two comparators, each configured with different thresholds, sample an input signal. The output of one of these comparators is selected and used as the output of the receiver and may be optionally input to additional DFE circuitry. The output of the other (non-selected) comparator is used to adjust an input offset voltage of that same comparator. Adjustments to the offset voltages of the comparators may be based on a statistical analysis of the respective outputs of the two comparators when not selected. Adjustments to the offset voltages of the comparators may be based on comparisons between the respective outputs of the two comparators when not selected to the outputs of a reference comparator that has been calibrated for minimal or zero offset.
1. An integrated circuit, comprising:
a first comparator configured to receive as inputs an input signal and a first threshold, the first comparator to produce a first comparator output;
a second comparator configured to receive as inputs the input signal and a second threshold, the second comparator to produce a second comparator output;
a first selector configured to select a first one of the first comparator output and the second comparator output based on at least one previous value output by the first selector, the first selected one of the first comparator output and the second comparator output to be provided as a value output by the first selector;
a second selector configured to select a second one of the first comparator output and the second comparator output that is not the first one of the first comparator output and the second comparator output; and
offset adjustment circuitry configured to, based at least in part on the second one of the first comparator output and the second comparator output, alter an offset of at least one of the first comparator and the second comparator.
2. The integrated circuit of claim 1 , further comprising:
a reference comparator configured to produce a third comparator output that is based at least in part on the input signal, the offset adjustment circuitry to alter the offset of at least one of the first comparator and the second comparator based at least in part on the third comparator output.
3. The integrated circuit of claim 2 , wherein the third comparator output is compared to the second one of the first comparator output and the second comparator output.
4. The integrated circuit of claim 3 , wherein the reference comparator is calibrated to have minimized offset.
5. The integrated circuit of claim 1 , wherein the offset adjustment circuitry alters the offset of at least one of the first comparator and the second comparator based on a statistical analysis of the second one of the first comparator output and the second comparator output.
6. The integrated circuit of claim 5 , wherein the offset adjustment circuitry alters the offset of at least one of the first comparator and the second comparator based on a statistical analysis that further includes the first one of the first comparator output and the second comparator output.
7. An integrated circuit, comprising:
a receiver comprising loop unrolled decision feedback equalization (DFE) circuitry, the DFE circuitry selecting, based on at least one received value, a selected comparator to compare an input signal to a first received threshold to produce a first output value and an unselected comparator to compare the input signal to a second received threshold to produce a second output value, the selected comparator comparing the input signal to the first received threshold to produce the first output value concurrently with the unselected comparator comparing the input signal to the second received threshold to produce the second output value; and
circuitry to transmit the second output value from the unselected comparator to circuitry configured to adjust an input offset voltage of the unselected comparator.
8. The integrated circuit of claim 7 , further comprising:
a reference comparator circuitry configured to compare the input signal to the second threshold.
9. The integrated circuit of claim 8 , further comprising:
circuitry to transmit an output of the reference comparator to the circuitry configured to adjust the input offset voltage of the unselected comparator.
10. The integrated circuit of claim 9 , wherein the reference comparator is calibrated for minimized input offset voltage.
11. The integrated circuit of claim 10 , wherein the reference comparator is to be used to monitor a signal eye of the input signal.
12. The integrated circuit of claim 9 , further comprising:
circuitry to transmit the first output value from the selected comparator to the circuitry configured to adjust the input offset voltage of the unselected comparator.
13. The integrated circuit of claim 12 , wherein the input offset voltage of the unselected comparator is adjusted based at least on statistics associated with at least a plurality of outputs of the unselected comparator and a plurality of outputs of the selected comparator.
14. A method of adjusting an input offset voltage of a comparator, comprising:
receiving, by a first comparator, an input signal and a first threshold;
producing, by the first comparator, a first output value corresponding to a comparison of the input signal to the first threshold;
receiving, by a second comparator, the input signal and a second threshold;
producing, by the second comparator, a second output value corresponding to a comparison of the input signal to the second threshold, the comparison of the input signal to the first threshold and the comparison of the input signal to the second threshold occurring concurrently;
selecting, based on at least one previously selected output value, one of the first output value and the second output value to be a selected output value of a receiver; and,
adjusting, based at least in part on a one of the first output value and second output value that is not the selected output value of the receiver, an input offset voltage of the second comparator.
15. The method of claim 14 , wherein the adjusting of the input offset voltage of the second comparator comprises determining, based at least in part on statistics that are based at least in part on the one of the first output value and the second output value that is not the selected output value of the receiver, whether to adjust the input offset voltage of the second comparator.
16. The method of claim 14 , further comprising:
receiving, by a reference comparator, the input signal; and
producing, by the reference comparator, a reference output value corresponding to a comparison of the input signal to the second threshold, wherein the adjusting is further based at least in part on the reference output value.
17. The method of claim 16 , further comprising:
calibrating the reference comparator to minimize an input offset voltage of the reference comparator.
18. The method of claim 14 , further comprising:
based on a plurality of first output values, calculate at least one indicator of a statistical profile of first output values; and
based on a plurality of second output values, calculate at least one indicator of a statistical profile of second output values.
19. The method of claim 14 , wherein the adjusting of the input offset voltage of the second comparator is based on the at least one indicator of the statistical profile of first output values and the at least one indicator of the statistical profile of second output values.