IP Library › Granted Patent US 11,791,640
Granted Patent B2
US 11,791,640 · App. 17/298,698 · Granted Oct 17, 2023

Overdischarge prevention circuit of secondary battery and secondary battery module

Inventors: Munehiro Kozuma (Atsugi, JP); Takayuki Ikeda (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H02J7/00306H01M10/44H01M10/48H02J7/0031H02J7/0047H01M2220/20
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Quick Facts
Patent No.
US 11,791,640
App. No.
17/298,698
Granted
Oct 17, 2023
Kind
B2
Abstract

Rapid degradation an off-leakage current in an overdischarged state is prevented. In order to prevent an overdischarged state, a control circuit with low leakage current includes a transistor using an oxide semiconductor, whereby the characteristics of the secondary battery are retained. In addition, a system in which a control signal generation circuit is also integrated is formed. With this system structure, the control circuit enters a low-power consumption mode in accordance with the circuit operation after an overdischarge is detected. When recovering from an overdischarged state, the control circuit enters a normally-operating mode in accordance with the voltage increase when charging is started.

Claims (19)

1. An overdischarge prevention circuit of a secondary battery, comprising:

a charging control circuit electrically connected to the secondary battery;

a disconnecting transistor between the secondary battery and the charging control circuit;

a first transistor whose source is electrically connected to a wiring connecting the secondary battery and the disconnecting transistor;

a second transistor connected to a wiring connecting the disconnecting transistor and the charging control circuit; and

a third transistor whose drain or source is connected to a gate of the second transistor.

2. The overdischarge prevention circuit according to claim 1 , further comprising an inverter,

wherein an input of the inverter is connected to a drain of the second transistor, and

wherein an output of the inverter is connected to a gate of the first transistor.

3. The overdischarge prevention circuit according to claim 2 , wherein charging detection is performed using the second transistor, the third transistor, and the inverter.

4. The overdischarge prevention circuit according to claim 1 , wherein a charging detection circuit included in the overdischarge prevention circuit disconnects electrical connection between the first transistor and the second transistor by driving the disconnecting transistor.

5. The overdischarge prevention circuit according to claim 1 , wherein a semiconductor layer of the first transistor is an oxide semiconductor layer.

6. An electronic device comprising the overdischarge prevention circuit according to claim 1 .

7. A secondary battery module comprising:

a secondary battery and a charging control circuit electrically connected to the secondary battery;

a disconnecting transistor between the secondary battery and the charging control circuit;

a first transistor whose source is electrically connected to a wiring connecting the secondary battery and the disconnecting transistor;

a second transistor connected to a wiring connecting the disconnecting transistor and the charging control circuit; and

a third transistor whose drain or source is connected to a gate of the second transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2021
From: KOZUMA, MUNEHIRO; IKEDA, TAKAYUKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 056402/0293 →
Priority Claims (2)
JP 2018-237087 · Dec 19, 2018 · national
JP 2018-240100 · Dec 21, 2018 · national
Continuity (1)
Related Publication 20220052541A1 · Feb 17, 2022