Patterning material including carbon-containing layer and method for semiconductor device fabrication
In one exemplary aspect, the present disclosure is directed to a method for lithography patterning. The method includes providing a substrate and forming a target layer over the substrate. A patterning layer is formed by depositing a first layer having an organic composition having a composition including at least 50 atomic percentage carbon; depositing a second layer including silicon; and depositing a photosensitive layer on the second layer. In some implementations, the first layer is deposited by ALD, CVD, or PVD processes.
1 . A method for lithography patterning, comprising:
forming a target layer over a substrate;
depositing a masking layer over the target layer, wherein depositing the masking layer includes forming a hard mask layer between two dielectric layers;
forming a patterning layer over the masking layer, wherein the forming the patterning layer, includes:
depositing a first layer having a composition including at least 50 atomic percentage carbon directly on the masking layer;
depositing a second layer of amorphous silicon directly on the first layer; and
depositing a photosensitive layer on the second layer;
etching the patterning layer to form a pattern, wherein the etching the patterning layer to form the pattern includes:
using O 2 etch gas to etch the second layer and the first layer, wherein the using O 2 etch gas converts the second layer to a composition including silicon, oxygen and carbon and wherein after the using the O 2 etch gas, the second layer has a height h 1 and a curvilinear upper surface in a cross-sectional view and the first layer has a height h 2 underlying the second layer, and
wherein a ratio of h 1 to h 2 is between approximately 1:2.5 and approximately 1:5; and
removing the photosensitive layer during the etching; and
after the etching the patterning layer to form the pattern, performing a masking layer etch using the pattern of the patterning layer to define an etching pattern during the masking layer etch.
2 . The method of claim 1 , wherein the target layer is an interlayer dielectric (ILD) layer formed over the substrate, wherein the ILD layer is formed directly under the masking layer.
3 . The method of claim 2 , further comprising:
patterning the photosensitive layer, wherein the patterning defines a metallization layer to be formed in the ILD layer.
4 . The method of claim 1 , wherein the depositing the first layer having the composition includes forming an amorphous carbon layer.
5 . The method of claim 1 , wherein the depositing the first layer includes depositing carbon and hydrogen by at least one of CVD, ALD, or PVD.
6 . The method of claim 1 , wherein the depositing the second layer including amorphous silicon includes depositing amorphous silicon (a-Si) by atomic layer deposition.
7 . The method of claim 6 , wherein the depositing the amorphous silicon includes:
selecting a temperature and selecting a pressure, wherein the selected temperature is between approximately room temperature and 600 degrees Celsius and the selected pressure is between zero and 100 torr; and
performing the deposition of the amorphous silicon at the selected temperature and selected pressure.
8 . The method of claim 1 , further comprising:
depositing an adhesion layer between the second layer and the photosensitive layer.
9 . A method comprising:
providing a first layer over a substrate, wherein the first layer has a first pattern including a first opening and a second opening, the second opening spaced a first distance in a first direction from the first opening in a top view;
depositing a first patterning stack over the first layer having the first pattern, wherein the depositing the first patterning stack includes forming:
an amorphous carbon layer on the first layer having the first pattern;
a silicon-containing layer on the amorphous carbon layer; and
a patterned photoresist layer disposed over the silicon-containing layer, wherein the patterned photoresist layer defines a second pattern of a third opening and a fourth opening, the third opening spaced a second distance from the fourth opening in a second direction of the top view, wherein the third opening and the fourth opening each extend from the first opening to the second opening in the top view;
etching the first layer using the first patterning stack as a mask during the etching to provide a patterned first layer after the etching, the patterned first layer having a pattern defined by the first opening, second opening, third opening and the fourth opening;
depositing spacer elements on sidewalls of the patterned first layer;
depositing a second patterning stack over the first layer having the first pattern, wherein the depositing the second patterning stack includes forming:
another amorphous carbon layer on the first layer having the first pattern and the spacer elements;
another silicon-containing layer on the another amorphous carbon layer; and
another patterned photoresist layer disposed over the another silicon-containing layer, wherein the another patterned photoresist layer defines a third pattern of a fifth opening, the fifth opening located in the second distance between the third opening and the fourth opening in the top view and extending over and between the first opening and the second opening in the top view;
etching the first layer using the second patterning stack as a mask while removing a portion of the first layer between the spacer elements; and
using the spacer elements and remaining first layer to define a pattern for etching an underlying layer.
10 . The method of claim 9 , wherein the underlying layer is a hard mask layer, and the method further comprises using the hard mask layer to pattern openings of a dielectric layer.
11 . The method of claim 10 , filling the openings of the dielectric layer with conductive material.
12 . The method of claim 9 , wherein the fifth opening extends over the first opening and the second opening of the first layer in the top view and is between the third opening and the fourth opening of the first layer in the top view.
13 . The method of claim 9 , further comprising:
forming a hard mask layer disposed over the first layer;
depositing a third patterning stack to define the first opening and the second opening in the first layer, wherein the depositing the third patterning stack includes:
a third amorphous carbon layer on the hard mask layer;
a third silicon-containing layer on the third amorphous carbon layer; and
a third patterned photoresist layer disposed over the third silicon-containing layer, wherein the third patterned photoresist layer defines the first opening and the second opening; and
etching the first layer to from the first opening and the second opening using the third patterning stack.
14 . A method for lithography patterning, comprising:
forming a target layer over a substrate;
depositing a masking layer over the target layer, wherein depositing the masking layer includes forming a hard mask layer between two dielectric layers;
forming a patterning stack, wherein the forming the patterning stack, includes:
depositing a first layer having a composition including at least 50 atomic percentage carbon directly on the masking layer;
depositing a second layer of amorphous silicon directly on the first layer;
depositing a photosensitive layer on the second layer; and
patterning the photosensitive layer to form a pattern of a plurality of masking element features each having a sidewall and a top surface;
performing a first etching process to reduce a height of each of the plurality of masking element features and etch the second layer to provide an exposed top surface of the second layer extending between each of the plurality of masking element features, the exposed top surface of the second layer being rounded in a cross-sectional view;
performing a second etching process after the first etching process selective to the second layer of amorphous silicon, wherein the second etching process stops at a top surface of the first layer and wherein the performing the second etching process provides tapered sidewalls of the second layer of amorphous silicon underlying each of the plurality of masking element features; and
performing a third etching process after the second etching process, wherein the third etching process is selective to the composition of the first layer, wherein after the third etching process a masking element including a first height of the second layer over a second height of the first layer remains.
15 . The method of claim 14 , wherein exposed top surface of the second layer of amorphous silicon after the first etching process extends between each of the plurality of masking element features, the plurality of masking element features having a rounded upper surface in the cross-sectional view.
16 . The method of claim 14 , wherein the third etching process removes the photosensitive layer from the substrate.
17 . The method of claim 14 , further comprising:
using the masking element to define another pattern during a fourth etching process etching a top layer of the masking layer, wherein the second layer is removed from the substrate during the fourth etching process.
18 . The method of claim 17 , wherein the fourth etching process forms a rounded top surface of the first layer.