IP Library › Granted Patent US 11,848,264
Granted Patent B2
US 11,848,264 · App. 17/303,600 · Granted Dec 19, 2023

Semiconductor structure with stacked vias having dome-shaped tips

Inventors: Koichi Motoyama (Clifton Park, NY); Kenneth Chun Kuen Cheng (Shatin, HK); Chanro Park (Clifton Park, NY); Alexander Reznicek (Troy, NY)
Assignee: International Business Machines Corporation
H01L23/5226H01L21/7685H01L21/76852H01L21/76885H01L21/76897H01L23/5283H01L23/53257H01L23/53266
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Quick Facts
Patent No.
US 11,848,264
App. No.
17/303,600
Granted
Dec 19, 2023
Kind
B2
Abstract

A semiconductor structure may include a metal line, a via above and in electrical contact with the metal lines, and a dielectric layer positioned along a top surface of the metal lines. A top surface of the dielectric layer may be below the dome shaped tip of the via. A top portion of the via may include a dome shaped tip. The semiconductor structure may include a liner positioned along the top surface of the dielectric layer and a top surface of the dome shaped tip of the via. The liner may be made of tantalum nitride or titanium nitride. The dielectric layer may be made of a low-k material. The metal line and the via may be made of ruthenium. The metal line may be made of molybdenum.

Claims (13)

1. A semiconductor structure comprising:

a first metal line;

a first via above and in electrical contact with the first metal line, wherein a top portion of the first via includes a first dome shaped tip;

a first dielectric layer positioned along a top surface of the first metal line, wherein a top surface of the first dielectric layer is below the first dome shaped tip of the first via;

a first liner positioned along the top surface of the first dielectric layer and a top surface of the first dome shaped tip of the first via; and

a second via above and in electrical contact with a second metal line, wherein a top portion of the second via includes a second dome shaped tip,

wherein the second metal line is on top of and in direct contact with the first liner; wherein the first dome shaped tip of the first via has an enlarged width that is wider than a bottom of the first dome shaped tip; and wherein a bottom of the first via is wider than the bottom of the first dome shaped tip.

2. The semiconductor structure of claim 1 , further comprising:

a second dielectric layer positioned along a top surface of the second metal line, wherein a top surface of the second dielectric layer is below the second dome shaped tip of the second via; and

a second liner positioned along the top surface of the second dielectric layer and a top surface of the second dome shaped tip of the second via.

3. The semiconductor structure of claim 2 , wherein the first and second dielectric layers are made of a low-k material.

4. The semiconductor structure of claim 1 , wherein the first and second metal lines and the first and second vias are made of ruthenium.

5. The semiconductor structure of claim 1 , wherein the first and second metal lines and the first and second vias are made of molybdenum.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2021
From: MOTOYAMA, KOICHI; CHENG, KENNETH CHUN KUEN; PARK, CHANRO; REZNICEK, ALEXANDER
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 056423/0779 →
Continuity (1)
Related Publication 20220392838A1 · Dec 8, 2022
Cited By (1)
US 12,266,605