IP Library Granted Patent US 11,677,410
Granted Patent B2
US 11,677,410 · App. 17/310,099 · Granted Jun 13, 2023

Spur reduction for analog-to-digital converters

Inventors: Paul K. W. Jackson (Cross Junction, VA); William O'Reilly (Waukesha, WI)
Assignee: Precision Receivers Incorporated
H03M1/08
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Quick Facts
Patent No.
US 11,677,410
App. No.
17/310,099
Granted
Jun 13, 2023
Kind
B2
Abstract

Methods, systems, computer-readable media, and apparatuses for spurious information reduction in a data signal are presented. One example of such an apparatus includes a data converter including a plurality of analog-to-digital converters (ADCs) and configured to produce a plurality of sampled signals, a normalizer configured to obtain a plurality of common-bandwidth signals from at least the plurality of sampled signals, and a common-mode filter configured to produce a digital output signal based on the plurality of common-bandwidth signals.

Claims (57)

1. An apparatus for spurious information reduction in a data signal, the apparatus comprising:

a data converter including a plurality of analog-to-digital converters (ADCs), each of the plurality of ADCs being arranged to receive a corresponding one of a plurality of instances of an analog input signal,

wherein each of the plurality of ADCs is configured to generate a corresponding one of a plurality of sampled signals, and

wherein a first of the plurality of ADCs is configured to generate a first of the plurality of sampled signals by sampling a first of the plurality of instances of the analog input signal at a first sampling rate according to a first clock frequency, and

wherein a second of the plurality of ADCs is configured to generate a second of the plurality of sampled signals by sampling a second of the plurality of instances of the analog input signal at a second sampling rate that is different than the first sampling rate according to a second clock frequency that is different than the first clock frequency;

a normalizer configured to normalize at least one signal that is based on at least one of the plurality of sampled signals to obtain, from at least the plurality of sampled signals, a plurality of common-bandwidth signals, wherein each of the plurality of common-bandwidth signals is based on at least a corresponding one of the plurality of sampled signals, and

a common-mode filter configured to perform a common-mode filtering operation, based on information from the plurality of common-bandwidth signals, to produce a digital output signal.

2. The apparatus according to claim 1 , wherein each of the plurality of common-bandwidth signals is based on at least a corresponding one of the plurality of sampled signals and comprises an ordered sequence of values, and

wherein each value of the ordered sequence of values of a first of the plurality of common-bandwidth signals represents a same interval of a domain of the analog input signal as a corresponding value of the ordered sequence of values of a second of the plurality of common-bandwidth signals.

3. The apparatus according to claim 2 , wherein the data converter comprises a power divider configured to receive the analog input signal and to produce the plurality of instances of the analog input signal.

4. The apparatus according to claim 2 , wherein the data converter is configured to receive each of the plurality of instances of the analog input signal from a corresponding one of a plurality of elements of an antenna array.

5. The apparatus according to claim 2 , wherein the first clock frequency is mutually phase-coherent with the second clock frequency.

6. The apparatus according to claim 2 , wherein the first of the plurality of sampled signals has a first bandwidth, and

wherein the second of the plurality of sampled signals has a second bandwidth that is different than the first bandwidth, and

wherein the normalizer is configured to resample the first of the plurality of sampled signals to the second bandwidth.

7. The apparatus according to claim 2 , wherein the common-mode filtering operation is a common mode acceptance algorithm.

8. The apparatus according to claim 2 , wherein the common-mode filter is configured to perform the common-mode filtering operation by performing a spectral analysis to determine frequency content in each of the plurality of common-bandwidth signals.

9. The apparatus according to claim 2 , wherein the apparatus comprises a frequency shifter configured to produce the at least one signal by applying a frequency shift to at least one of the plurality of sampled signals to produce at least one frequency-shifted sampled signal, and

wherein, for each respective one of the at least one frequency-shifted sampled signal, at least one of the plurality of common-bandwidth signals is based on the respective one of the at least one frequency-shifted sampled signal.

10. The apparatus according to claim 9 , wherein the amount of the frequency shift is based on an indication that identifies a Nyquist zone among a plurality of Nyquist zones.

11. The apparatus according to claim 2 , wherein the common-mode filter is configured to perform the common-mode filtering operation by:

segregating each of the plurality of common-bandwidth signals into a same plurality of bins; and

at each bin of at least a portion of the plurality of bins, computing a corresponding one of a plurality of output components based on a minimum magnitude for the bin as selected across the plurality of common-bandwidth signals, and

wherein the digital output signal is based on the plurality of output components.

12. A method for spurious information reduction in a data signal, the method comprising:

receiving, by each of a plurality of analog-to-digital converters (ADCs), a corresponding one of a plurality of instances of an analog input signal;

generating, by each of the plurality of ADCs and responsive to the receiving, a corresponding one of a plurality of sampled signals, wherein the generating comprises:

sampling a first of the plurality of instances of the analog input signal by a first of the plurality of ADCs at a first sampling rate according to a first clock frequency to generate a first of the plurality of sampled signals, and

sampling a second of the plurality of instances of the analog input signal by a second of the plurality of ADCs at a second sampling rate that is different than the first sampling rate according to a second clock frequency that is different than the first clock frequency to generate a second of the plurality of sampled signals;

normalizing at least one signal that is based on at least one of the plurality of sampled signals to obtain, from at least the plurality of sampled signals, a plurality of common-bandwidth signals, wherein each of the plurality of common-bandwidth signals is based on at least a corresponding one of the plurality of sampled signals, and

performing a common-mode filtering operation, based on information from the plurality of common-bandwidth signals, to produce a digital output signal.

13. The method according to claim 12 , wherein each of the plurality of common-bandwidth signals is based on at least a corresponding one of the plurality of sampled signals and comprises an ordered sequence of values, and

wherein each value of the ordered sequence of values of a first of the plurality of common-bandwidth signals represents a same interval of a domain of the analog input signal as a corresponding value of the ordered sequence of values of a second of the plurality of common- bandwidth signals.

14. The method according to claim 13 , wherein the receiving comprises receiving each of the plurality of instances of the analog input signal from a corresponding one of a plurality of elements of an antenna array.

15. The method according to claim 13 , wherein the first of the plurality of sampled signals has a first bandwidth, and

wherein the second of the plurality of sampled signals has a second bandwidth that is different than the first bandwidth, and

wherein the normalizing comprises resampling the first of the plurality of sampled signals to the second bandwidth.

16. The method according to any one of claim 15 , wherein the normalizing comprises resampling the first of the plurality of sampled signals to the second bandwidth by time-domain interpolating the first of the plurality of sampled signals.

17. The method according to claim 15 , wherein the normalizing comprises resampling the first of the plurality of sampled signals to the second bandwidth by frequency-domain truncating the first of the plurality of sampled signals.

18. The method according to claim 13 , wherein the normalizing comprises modifying an amplitude of at least one of the plurality of sampled signals relative to another of the plurality of sampled signals.

19. The method according to claim 13 , wherein the method comprises producing the at least one signal by applying a frequency shift to at least one of the plurality of sampled signals to produce at least one frequency-shifted sampled signal, and

wherein, for each respective one of the at least one frequency-shifted sampled signal, at least one of the plurality of common-bandwidth signals is based on the respective one of the at least one frequency-shifted sampled signal.

20. The method according to claim 19 , wherein the amount of the frequency shift is based on an indication that identifies a Nyquist zone among a plurality of Nyquist zones.

21. The method according to claim 13 , wherein the common-mode filtering operation includes:

segregating each of the plurality of common-bandwidth signals into a same plurality of bins; and

at each bin of at least a portion of the plurality of bins, computing a corresponding one of a plurality of output components based on a minimum magnitude for the bin as selected across the plurality of common-bandwidth signals, and wherein the digital output signal is based on the plurality of output components.

22. A system for spurious information reduction in a data signal, the system comprising:

a data converter including a plurality of analog-to-digital converters (ADCs), each of the plurality of ADCs being arranged to receive a corresponding one of a plurality of instances of an analog input signal,

wherein each of the plurality of ADCs is configured to generate a corresponding one of a plurality of sampled signals, and

wherein a first of the plurality of ADCs is configured to generate a first of the plurality of sampled signals by sampling a first of the plurality of instances of the analog input signal at a first sampling rate according to a first clock frequency, and

wherein a second of the plurality of ADCs is configured to generate a second of the plurality of sampled signals by sampling a second of the plurality of instances of the analog input signal at a second sampling rate that is different than the first sampling rate according to a second clock frequency that is different than the first clock frequency, and

processing circuitry coupled to the data converter, the processing circuitry to:

normalize at least one signal that is based on at least one of the plurality of sampled signals to obtain, from at least the plurality of sampled signals, a plurality of common-bandwidth signals, wherein each of the plurality of common-bandwidth signals is based on at least a corresponding one of the plurality of sampled signals; and

perform a common-mode filtering operation, based on information from the plurality of common-bandwidth signals, to produce a digital output signal.

23. The system according to claim 22 , wherein the first of the plurality of sampled signals has a first bandwidth, and

wherein the second of the plurality of sampled signals has a second bandwidth that is different than the first bandwidth, and

wherein the normalizer is configured to resample the first of the plurality of sampled signals to the second bandwidth.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 057595 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT . Recorded Sep 27, 2021
From: JACKSON, PAUL K.W.; O'REILLY, WILLIAM
To: PRECISION RECEIVERS CORPORATION
Reel/Frame 057618/0005 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2021
From: JACKSON, PAUL K.W.; O'REILLY, WILLIAM
To: PRECISION RECEIVERS INCORPORATED
Reel/Frame 057595/0241 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2021
From: JACKSON, PAUL K.W.; O'REILLY, WILLIAM
To: PRECISION RECEIVERS INCORPORATED
Reel/Frame 057595/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2021
From: JACKSON, PAUL K.W.; O'REILLY, WILLIAM
To: PRECISION RECEIVERS INCORPORATED
Reel/Frame 057595/0338 →
CHANGE OF NAME Recorded Sep 24, 2021
From: PRECISION RECEIVERS CORPORATION
To: PRECISION RECEIVERS INCORPORATED
Reel/Frame 057602/0222 →
Continuity (3)
Provisional Application 62873970 · Jul 14, 2019
Provisional Application 62794413 · Jan 18, 2019
Related Publication 20220149855A1 · May 12, 2022