Confining filament at pillar center for memory devices
A semiconductor device with resistive memory includes a bottom electrode disposed on a base structure, the bottom electrode having a structure that tapers up from the base structure to a tip of the bottom electrode. The semiconductor device also includes sidewall spacers on the sides of the bottom electrode, an interlayer dielectric deposition (ILD) outside the sidewall spacers, and a top dielectric layer disposed over the bottom electrode, and the sidewall spacers. The semiconductor device further includes a top electrode deposited over the bottom electrode within the sidewall spacers. A filament formation region is formed at the tip of the bottom electrode.
1. A method for fabricating a semiconductor device including resistive memory, comprising:
patterning a bottom electrode to form a patterned bottom electrode;
forming sidewall spacers on sides of the patterned bottom electrode;
depositing an interlayer dielectric (ILD) around the sidewall spacers;
isotropically etching the bottom electrode within the sidewall spacers to form a tapered structure bottom electrode;
depositing a second dielectric layer over the ILD and the tapered structure bottom electrode; and
depositing a top electrode within the sidewall spacers on the tapered structure bottom electrode.
2. The method of claim 1 , wherein the bottom electrode is centrally disposed within the sidewall spacers.
3. The method of claim 2 , wherein the bottom electrode has a greater height than the sidewall spacers.
4. The method of claim 1 , wherein forming the sidewall spacers further comprises:
removing a mask layer;
conformally depositing a sidewall spacer layer around the patterned bottom electrode; and
etching back the sidewall spacer layer to expose the patterned bottom electrode and to form the sidewall spacers.
5. The method of claim 1 , further comprising:
etching a portion of the sidewall spacers to form lower sidewall spacers.
6. The method of claim 1 , wherein the tapered structure bottom electrode is a ridge with one of a conical shape, an asymptotic shape or a dome shape.
7. The method of claim 1 , further comprising:
depositing a second spacer to pinch off a bottom tip region of the patterned bottom electrode; and
performing second spacer etch back.
8. The method of claim 1 , wherein a filament formation region is directed to a center of a tip of the patterned bottom electrode.
9. The method of claim 8 , wherein creating sidewall spacers further comprises:
removing a mask layer;
conformally depositing a sidewall spacer layer around the patterned bottom electrode; and
etching back the sidewall spacer layer to expose the patterned bottom electrode and form the sidewall spacers, wherein the patterned bottom electrode includes the top dielectric barrier layer.
10. A method for fabricating a semiconductor device including resistive memory, comprising:
forming sidewall spacers on sides of a bottom electrode;
depositing an interlayer dielectric (ILD) around the sidewall spacers;
etching the bottom electrode within the sidewall spacers to form a tapered structure bottom electrode;
depositing a second dielectric layer over the ILD and the tapered structure bottom electrode; and
depositing a top electrode within the sidewall spacers on the tapered structure bottom electrode.
11. The method of claim 10 , wherein the bottom electrode is centrally disposed within the sidewall spacers.
12. The method of claim 11 , wherein the bottom electrode has a greater height than the sidewall spacers.
13. The method of claim 10 , wherein forming the sidewall spacers further comprises:
removing a mask layer;
conformally depositing a sidewall spacer layer around the patterned bottom electrode; and
etching back the sidewall spacer layer to expose the patterned bottom electrode and to form the sidewall spacers.
14. The method of claim 10 , further comprising:
etching a portion of the sidewall spacers to form lower sidewall spacers.
15. The method of claim 10 , wherein the tapered structure bottom electrode is a ridge with one of a conical shape, an asymptotic shape or a dome shape.
16. The method of claim 10 , further comprising:
depositing a second spacer to pinch off a bottom tip region of the bottom electrode; and
performing second spacer etch back.
17. The method of claim 10 , wherein a filament formation region is directed to a center of a tip of the bottom electrode.