System and method for processing between a plurality of quantum controllers
A set of quantum controllers are operable to transmit quantum state data to a quantum control switch. The quantum control switch comprises vector processors that operate on the quantum state data from the set of quantum controllers. Each vector processor transmits a result of the operation to a corresponding quantum controller in the set of quantum controllers.
1. A quantum controller comprising:
a plurality of quantum controllers (QCs), wherein each QC is operable to generate:
a plurality of electromagnetic wave pulses that are applied to one or more qubits to perform a desired logic operation,
data associated with a pulse processor vector, and
an operation associated with the pulse processor vector; and
a quantum control switch comprising a plurality of vector processors, wherein:
each vector processor of the plurality of vector processors is configured to receive data generated by every QC of the plurality of QCs,
each vector processor of the plurality of vector processors is configured to perform an operation, generated by a QC of the plurality of QCs, on data generated by one or more QCs of the plurality of QCs,
the operation performed by each vector processor is independently configurable,
each pulse processor vector is independently configurable, and
each vector processor of the plurality of vector processors is configured to return a result of the operation to a corresponding QC of the plurality of QCs.
2. The quantum controller of claim 1 , wherein a latency in returning the result of the operation to the corresponding QC is deterministic.
3. The quantum controller of claim 1 , wherein the pulse processor vector comprises quantum state data of the corresponding QC.
4. The quantum controller of claim 1 , wherein the pulse processor vector comprises metadata, and wherein the metadata comprises at least one of a qubit index, a memory address, and an opcode.
5. The quantum controller of claim 1 , wherein the pulse processor vector comprises a quantum state estimate for one or more qubits controlled by the corresponding QC.
6. The quantum controller of claim 5 , wherein the quantum state estimate comprises at least one of digital data and analog data representing a qubit readout response.
7. The quantum controller of claim 1 , wherein the pulse processor vector comprises qubit interface data according to the corresponding QC, and wherein the qubit interface data validates and integrity of data from the corresponding QC.
8. The quantum controller of claim 1 , wherein the quantum control switch comprises a plurality of parsers, and wherein each parser of the plurality of parsers is operable to parse the pulse processor vector from a QC of the plurality of QCs.
9. The quantum controller of claim 1 , wherein each vector processor of the plurality of vector processors is configured to perform the operation over a selected set of data from more than one pulse processor vector.
10. The quantum controller of claim 1 , wherein the plurality of vector processors operate in parallel.
11. The quantum controller of claim 1 , wherein each vector processor of the plurality of vector processors is configured to perform the operation iteratively.
12. The quantum controller of claim 1 , wherein each vector processor of the plurality of vector processors is configured to perform the operation according to a stored history of data.
13. The quantum controller of claim 1 , wherein the quantum control switch is operable to communicate an error indication to one or more of the plurality of QC's.
14. The quantum controller of claim 1 , wherein at least one vector processor of the plurality of vector processors is configured to track and/or correct a quantum error.
15. The quantum controller of claim 14 , wherein the at least one vector processor is operable according to a surface code.
16. The quantum controller of claim 14 , wherein the at least one vector processor is operable according to a cat code.
17. The quantum controller of claim 14 , wherein the quantum error correction algorithm is operable to correct a plurality of errors.
18. The quantum controller of claim 1 , wherein a vector processor of the plurality of vector processors is configured to receive an instruction from the corresponding QC of the plurality of QCs, and wherein the operation performed by the vector processor on the pulse processor vectors from one or more QCs is configured according to the instruction.
19. The quantum controller of claim 1 , wherein the quantum control switch comprises a plurality of interfaces, and wherein each interface of the plurality of interfaces comprises a duplex port configured to serially communicate data with a QC.
20. The quantum controller of claim 19 , wherein each interface of the plurality of interfaces is operable to provide data from a pulse processor vector to a data bus that is operably coupled to every vector processor of the plurality of vector processors.
21. The quantum controller of claim 1 , wherein a vector processor of the plurality of vector processors is configured to receive an instruction and a qubit index from a corresponding QC, and wherein the operation is performed according to the instruction and the qubit index.
22. The quantum controller of claim 21 , wherein the qubit index is changed while the pulse processor vector from each QC remains the same.
23. The quantum controller of claim 21 , wherein the vector processor returns a result that corresponds to the qubit index.
24. A method quantum controller processing comprising:
transmitting an operation and data, associated with a pulse processor vector, from each of a plurality of QCs to a quantum control switch, wherein the quantum control switch comprises a plurality of vector processors;
receiving, by each vector processor of the plurality of vector processors, the data from the plurality of QCs;
performing an operation, in each vector processor of the plurality of vector processors, on the pulse processor vector from one or more QCs of the plurality of QCs;
returning a result of each operation to a corresponding QC of the plurality of QCs; and
applying a plurality of electromagnetic wave pulses, according to each result, to one or more qubits controlled by the corresponding QC of the plurality of QCs.
25. The method of claim 24 , wherein the pulse processor vector comprises quantum state data of the corresponding QC.
26. The method of claim 24 , wherein the pulse processor vector from each QC comprises a quantum state estimate for each of a plurality of qubits.
27. The method of claim 24 , wherein the pulse processor vector comprises qubit interface data according to the corresponding QC.
28. The method of claim 24 , wherein the method comprises:
receiving an instruction from the corresponding QC, wherein the operation is configured according to the instruction.
29. The method of claim 24 , wherein the method comprises:
receiving the pulse processor vector from each QC serially; and
transmitting the result of the operation to the corresponding QC serially.
30. The method of claim 24 , wherein the method comprises:
receiving, by a vector processor, an instruction, quantum state data from all QCs and a qubit index; and
performing the operation, by the vector processor, according to the instruction and the qubit index.
31. The method of claim 30 , wherein the method comprises:
changing the qubit index while the pulse processor vector from each QC remains the same.
32. The method of claim 30 , wherein the method comprises:
returning a result, from the vector processor, that corresponds to the qubit index.
33. The method of claim 24 , wherein the method comprises parsing the pulse processor vector from each QC of the plurality of QCs.
34. The method of claim 24 , wherein the operation is performed over a selected set data from more than one pulse processor vector.
35. The method of claim 24 , wherein the plurality of vector processors operate in parallel.
36. The method of claim 24 , wherein each vector processor of the plurality of vector processors is configured to perform the operation iteratively.
37. The method of claim 24 , wherein each vector processor of the plurality of vector processors is configured to perform the operation according to a stored history of data.
38. The method of claim 24 , wherein the method comprises communicating an error indication to one or more of the plurality of QC's.
39. The method of claim 24 , wherein the operation is a quantum error correction algorithm.
40. The method of claim 39 , wherein the quantum error correction algorithm use a surface code.
41. The method of claim 39 , wherein the quantum error correction algorithm is operable to correct a plurality of errors.