IP Library Granted Patent US 12,058,904
Granted Patent B2
US 12,058,904 · App. 17/326,245 · Granted Aug 6, 2024

Display device capable of evenly transmitting an initialization voltage

Inventors: Ji Su Na (Yongin-si, KR); Won Kyu Kwak (Seongnam-si, KR); Yang Wan Kim (Hwaseong-si, KR); Young Jin Cho (Seoul, KR)
Assignee: Samsung Display Co., Ltd.
H10K59/131H10K59/353
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Quick Facts
Patent No.
US 12,058,904
App. No.
17/326,245
Granted
Aug 6, 2024
Kind
B2
Abstract

Provided is a display device which comprises a substrate, a plurality of pixels disposed on the substrate, a first initialization voltage line disposed on the substrate along a first direction, and a second initialization voltage line disposed on a different layer from the first initialization voltage line, wherein the second initialization voltage line may include a horizontal portion disposed along the first direction and a vertical portion disposed along a second direction crossing the first direction, and the vertical portion may be disposed between a plurality of pixels adjacent to each other in the first direction.

Claims (58)

1. A display device comprising:

a substrate;

a plurality of pixels disposed on the substrate;

a first initialization voltage line disposed on the substrate and extending along a first direction; and

a second initialization voltage line disposed on a different layer from the first initialization voltage line, wherein the second initialization voltage line includes horizontal portions extending along the first direction and vertical portions extending along a second direction crossing the first direction,

the horizontal portions and the vertical portions form a plurality of opening areas each of which is completely surrounded by adjacent horizontal portions and adjacent vertical portions, and

the first initialization voltage line is disposed closer to the substrate than the second initialization voltage line

wherein the display device further comprising:

a connection electrode disposed on a same layer as the second initialization voltage line; and

a driving voltage line disposed on the second initialization voltage line and the connection electrode along the second direction, wherein the connection electrode includes a stem portion parallel to the second direction and an extension portion extending from the stem portion in the first direction,

wherein the extension portion of the connection electrode is not disposed in one of the plurality of pixels in which the vertical portions of the second initialization voltage line is disposed.

2. The display device of claim 1 , wherein

one vertical portion is disposed along the first direction for every four pixels.

3. The display device of claim 1 , wherein the connection electrode is connected to the driving voltage line in the extension portion of the connection electrode.

4. The display device of claim 1 , wherein,

among pixels which are disposed adjacent each other in the first direction, in one of the plurality of pixels in which the vertical portions of the second initialization voltage line is not disposed between the pixels,

extension portions are disposed at each side of the stem portion of the connection electrode, and

each of the extension portions is connected to the driving voltage line in two pixels adjacent to each other in the first direction.

5. The display device of claim 1 , further comprising

a polycrystalline semiconductor layer disposed between the substrate and the first initialization voltage line.

6. The display device of claim 5 , wherein

a portion of the polycrystalline semiconductor layer overlaps the connection electrode and the second initialization voltage line in a third direction perpendicular to a surface of the substrate.

7. The display device of claim 5 , further comprising

an oxide semiconductor layer disposed between the polycrystalline semiconductor layer and the second initialization voltage line.

8. The display device of claim 7 , wherein

the oxide semiconductor layer is disposed along the second direction, and

the oxide semiconductor layer does not overlap the polycrystalline semiconductor layer in a third direction perpendicular to the surface of the substrate.

9. The display device of claim 7 , wherein

the oxide semiconductor layer does not overlap the connection electrode and the second initialization voltage line in a third direction perpendicular to the surface of the substrate.

10. A display device comprising:

a substrate;

a first semiconductor layer disposed on the substrate;

a first initialization voltage line extending along a first direction and disposed on the first semiconductor layer;

a second semiconductor layer disposed on the first initialization voltage line and extending along a second direction crossing the first direction;

a second initialization voltage line and a connection electrode disposed on the second semiconductor layer; and

a driving voltage line disposed on the second initialization voltage line and the connection electrode, and extending along the second direction,

wherein the second initialization voltage line includes horizontal portions extending along the first direction and vertical portions extending along the second direction,

the horizontal portions and the vertical portions form a plurality of opening areas each of which is completely surrounded by adjacent horizontal portions and adjacent vertical portions, and

the first initialization voltage line is disposed closer to the substrate than the second initialization voltage line,

wherein

the connection electrode includes a stem portion parallel to the second direction and an extension portion extending from the stem portion in the first direction, and

the connection electrode is connected to the driving voltage line in the extension portion,

wherein the extension portion of the connection electrode is not disposed in one of the plurality of pixels in which the vertical portions of the second initialization voltage line is disposed.

11. The display device of claim 10 , wherein the stem portion of the connection electrode is disposed between the extension portion of the connection electrode and the vertical portions of the second initialization voltage line.

12. The display device of claim 10 , wherein

the first semiconductor layer is a polycrystalline semiconductor layer and the second semiconductor layer is an oxide semiconductor layer, and

the first semiconductor layer and the second semiconductor layer do not overlap each other in a third direction perpendicular to a surface of the substrate.

13. The display device of claim 12 , further comprising

a gate electrode, a first scan line, a light emission control line, and a bypass control line disposed on a same layer as the first initialization voltage line along the first direction,

wherein the polycrystalline semiconductor layer overlapping the gate electrode in the third direction perpendicular to the surface of the substrate forms a driving transistor.

14. The display device of claim 13 , wherein

an area of the polycrystalline semiconductor layer overlapping the first scan line in the third direction perpendicular to the surface of the substrate forms a second transistor,

an area of the polycrystalline semiconductor layer overlapping the light emission control line in the third direction perpendicular to the surface of the substrate forms a fifth transistor and a sixth transistor, and

an area of the polycrystalline semiconductor layer overlapping the bypass control line in the third direction perpendicular to the surface of the substrate forms a seventh transistor and an eighth transistor.

15. The display device of claim 12 , further comprising

an initialization control line and a second scan line disposed along the first direction between the oxide semiconductor layer and the second initialization voltage line,

wherein an area of the oxide semiconductor layer overlapping the second scan line in the third direction perpendicular to the surface of the substrate forms a third transistor, and

an area of the oxide semiconductor layer overlapping the initialization control line in the third direction perpendicular to the surface of the substrate forms a fourth transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2021
From: NA, JI SU; KWAK, WON KYU; KIM, YANG WAN; CHO, YOUNG JIN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 056307/0911 →
Priority Claims (1)
KR 10-2020-0097931 · Aug 5, 2020 · national
Continuity (1)
Related Publication 20220045158A1 · Feb 10, 2022