IP Library › Granted Patent US 12,126,305
Granted Patent B2
US 12,126,305 · App. 17/331,996 · Granted Oct 22, 2024

Radio frequency (RF) equalizer in an envelope tracking (ET) circuit

Inventor: Nadim Khlat (Cugnaux, FR)
Assignee: Qorvo US, Inc.
H03F1/0233H03F3/45475H04B1/04H03F2200/105H03F2200/451
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Quick Facts
Patent No.
US 12,126,305
App. No.
17/331,996
Granted
Oct 22, 2024
Kind
B2
Abstract

A radio frequency (RF) equalizer in an envelope tracking (ET) circuit is disclosed. A transmitter chain includes an ET circuit having an RF equalizer therein. The RF equalizer includes a two operational amplifier (op-amp) structure that provides a relatively flat gain and a relatively constant negative group delay across a frequency range of interest (e.g., up to 200 MHz). The simple two op-amp structure provides frequency response equalization and time tuning adjustment and/or creates a window Vcc signal.

Claims (89)

1. An envelope tracking (ET) circuit comprising:

an equalizer comprising a first branch, the first branch comprising:

a positive differential input node;

a negative differential input node;

a first operational amplifier (op-amp) comprising:

a first negative input coupled to the positive differential input node; and

a first output;

a first feedback circuit coupling the first output to the first negative input;

a second op-amp comprising:

a second negative input coupled to the negative differential input node and the first output; and

a second output; and

a second feedback impedance network coupling the second output to the second negative input.

2. The ET circuit of claim 1 , wherein the first feedback circuit comprises a resistor.

3. The ET circuit of claim 1 , wherein the second feedback impedance network comprises:

a first resistor;

a second resistor coupled to the first resistor with a node therebetween; and

a capacitor coupling the node to ground.

4. The ET circuit of claim 1 , further comprising a capacitor connected to the first output and the second negative input.

5. The ET circuit of claim 1 , further comprising a first input circuit coupled to the first negative input and comprising a resistor and a capacitor electrically parallel to one another.

6. The ET circuit of claim 1 , further comprising a second input circuit coupled to the second negative input and comprising a resistor.

7. The ET circuit of claim 1 , wherein the first op-amp further comprises a positive input coupled to ground.

8. The ET circuit of claim 1 , wherein the second op-amp further comprises a positive input coupled to ground.

9. The ET circuit of claim 1 , wherein the second feedback impedance network comprises:

a first resistor;

a second resistor coupled to the first resistor with a node therebetween;

a capacitor coupled to the node; and

a third resistor coupling the capacitor to ground.

10. The ET circuit of claim 1 , further comprising a second branch, the second branch comprising:

a second positive differential input node;

a second negative differential input node;

a third op-amp comprising:

a third negative input coupled to the second negative differential input node; and

a third output;

a third feedback circuit coupling the third output to the third negative input;

a fourth op-amp comprising:

a fourth negative input coupled to the second positive differential input node and the third output; and

a fourth output; and

a fourth feedback impedance network coupling the fourth output to the fourth negative input.

11. A transmitter circuit comprising:

a transceiver;

an amplifier network coupled to the transceiver; and

an envelope tracking (ET) circuit coupled to the transceiver and the amplifier network,

the ET circuit comprising:

an equalizer comprising:

a positive differential input node;

a negative differential input node;

a first operational amplifier (op-amp) comprising:

a first negative input coupled to the positive differential input node; and

a first output;

a first feedback circuit coupling the first output to the first negative input;

a second op-amp comprising:

a second negative input coupled to the negative differential input node and the first output; and

a second output; and

a second feedback impedance network coupling the second output to the second negative input.

12. An envelope tracking (ET) circuit comprising:

an equalizer comprising:

a positive input node;

a negative input node;

a first operational amplifier (op-amp) comprising:

a first negative input coupled to the negative input node;

a first negative output;

a first positive input coupled to the positive input node; and

a first positive output;

a first feedback circuit coupling the first positive output to the first negative input;

a second feedback circuit coupling the first negative output to the first positive input;

a second op-amp comprising:

a second negative input coupled to the first positive output;

a second positive input coupled to the first negative output;

a second negative output; and

a second positive output;

a first feedback impedance network coupling the second negative output to the second positive input;

a second feedback impedance network coupling the second positive output to the second negative input node; and

a third impedance network coupling the second positive input to the negative input node.

13. The ET circuit of claim 12 , further comprising a fourth impedance network coupling the second negative input to the positive input node.

14. The ET circuit of claim 12 , further comprising a first input circuit serially positioned between the negative input node and the first negative input.

15. The ET circuit of claim 14 , further comprising a second input circuit serially positioned between the positive input node and the first positive input.

16. The ET circuit of claim 12 , wherein the first feedback impedance network comprises:

two serially coupled resistors with a node therebetween, the node coupled to ground through a variable capacitor; and

a second variable capacitor electrically parallel to the two serially coupled resistors.

17. The ET circuit of claim 12 , wherein the third impedance network comprises a variable capacitor and a resistor, the resistor electrically parallel to the variable capacitor.

18. The ET circuit of claim 17 , further comprising a fourth impedance network, wherein the fourth impedance network comprises a second variable capacitor and a second resistor, the second resistor electrically parallel to the second variable capacitor.

19. The ET circuit of claim 12 , further comprising a variable capacitor electrically positioned between the first negative output and the second positive input.

20. A method of operating an envelope tracking circuit, comprising:

receiving a differential signal at a positive differential input node and a negative differential input node;

sending signals from the positive differential input node to a first negative input of a first operational amplifier (op-amp);

providing a first feedback signal through a first feedback circuit from a first output of the first op-amp to the first negative input;

sending signals from the negative differential input node to a second negative input of a second op-amp;

coupling the first output to the second negative input;

providing a second feedback signal through a second feedback impedance network from a second output of the second op-amp to the second negative input.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2021
From: KHLAT, NADIM
To: QORVO US, INC.
Reel/Frame 056371/0030 →
Continuity (1)
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