IP Library Granted Patent US 11,985,865
Granted Patent B2
US 11,985,865 · App. 17/332,933 · Granted May 14, 2024

Display device including passivation layer with surface step and manufacturing method for the same

Inventors: Byoung Kwon Choo (Hwaseong-si, KR); Seung Bae Kang (Suwon-si, KR); Bong Gu Kang (Seoul, KR); Tae Joon Kim (Seoul, KR); Jeong Min Park (Seoul, KR); Joon-Hwa Bae (Suwon-si, KR); Hee Sung Yang (Hwaseong-si, KR); Woo Jin Cho (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
H10K59/123H10K50/84H10K50/865H10K59/38H10K59/40H10K71/00H10K59/1201
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Quick Facts
Patent No.
US 11,985,865
App. No.
17/332,933
Granted
May 14, 2024
Kind
B2
Abstract

A display device according to an embodiment includes: a substrate; a transistor that is disposed on the substrate; a light emitting diode that is disposed on the substrate, and connected to the transistor; and a passivation layer that is disposed between the transistor and the light emitting diode, wherein a surface step of the passivation layer is within a range of and including 1 nm to 30 nm.

Claims (25)

1. A display device comprising:

a substrate;

a polycrystalline semiconductor that is disposed on the substrate;

a first gate insulation layer that is disposed on the polycrystalline semiconductor;

a driving gate electrode that is disposed on the first gate insulating layer;

a second gate insulating layer that is disposed on the driving gate electrode;

a first interlayer insulation layer that is disposed on the second gate insulating layer;

an oxide semiconductor that is disposed on the first interlayer insulating layer;

a third gate insulating layer that is disposed on the oxide semiconductor;

a switching gate electrode that is disposed on the third gate insulating layer;

a second interlayer insulating layer that is disposed on the switching gate electrode;

a first source electrode and a first drain electrode that are disposed on the second interlayer insulating layer, and connected with the oxide semiconductor;

a second source electrode and a second drain electrode that are disposed on the second interlayer insulating layer, and connected to the polycrystalline semiconductor;

a light emitting diode that is disposed on the substrate, and connected to the second source electrode or the second drain electrode; and

a passivation layer that is disposed between the second interlayer insulating layer and the light emitting diode,

wherein a surface step of the passivation layer is within a range of and including 1 nm to 30 nm,

wherein the passivation layer comprises a first portion that overlaps the first source electrode, the first drain electrode, the second source electrode, and the second drain electrode, and a second portion that does not overlap the first source electrode, the first drain electrode, the second source electrode, and the second drain electrode, and

wherein a surface height of the first portion is higher than a surface height of the second portion.

2. The display device of claim 1 , wherein the first portion of the passivation layer includes a polished surface.

3. The display device of claim 1 , further comprising:

a touch portion that is disposed on the light emitting diode; and

an anti-reflection portion that is disposed on the touch portion.

4. The display device of claim 3 , wherein the anti-reflection portion includes a blocking layer and a color filter.

5. The display device of claim 4 , further comprising a thin film encapsulation layer that is disposed between the light emitting diode and the touch portion.

6. The display device of claim 1 , wherein the surface step of the passivation layer is within the range of and including 1 nm to 20 nm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2021
From: CHOO, BYOUNG KWON; KANG, SEUNG BAE; KANG, BONG GU; KIM, TAE JOON; PARK, JEONG MIN; BAE, JOON-HWA; YANG, HEE SUNG; CHO, WOO JIN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 056378/0498 →
Priority Claims (1)
KR 10-2020-0114909 · Sep 8, 2020 · national
Continuity (1)
Related Publication 20220077260A1 · Mar 10, 2022