Methods, systems, and computer readable media for performing page fault handling
Methods, systems, and computer readable media for performing page fault handling are disclosed. According to one method, the method includes: after a translation lookaside buffer (TLB) miss associated with a virtual memory page occurs, identifying, in a page table, a page table entry (PTE) associated with the virtual memory page; determining, using a first indicator in the PTE, that the virtual memory page is not present in a main memory; determining, using a second indicator in the PTE, that the virtual memory page is associated with a valid memory address and that the virtual memory page is capable of using pre-allocated pages; obtaining, from a pre-allocation table, a page frame number associated with a pre-allocated page; and updating the PTE to indicate the page frame number.
1. A method for performing page fault handling, the method comprising:
performing page fault handling operations, the page fault handling operations comprising:
after a translation lookaside buffer (TLB) miss associated with a virtual memory page occurs, identifying, in a page table, a page table entry (PTE) associated with the virtual memory page;
determining, using a first indicator in the PTE, that the virtual memory page is not present in a main memory;
determining, using a second indicator in the PTE, that the virtual memory page is associated with a valid memory address and that the virtual memory page is capable of using pre-allocated pages;
obtaining, from a pre-allocation table, a page frame number associated with a pre-allocated page; and
updating the PTE to indicate the page frame number.
2. The method of claim 1 , wherein at least one kernel associated background process performs one or more pre-page fault handling operations asynchronously.
3. The method of claim 2 , wherein one of the pre-page fault handling operations comprises:
pre-allocating virtual memory pages and storing corresponding page frame numbers in the pre-allocation table.
4. The method of claim 2 , wherein one of the pre-page fault handling operations comprises:
determining whether PTEs associated with a virtual memory region refer to valid memory addresses and for setting valid memory address indications in the PTEs associated with the virtual memory region.
5. The method of claim 1 , wherein the second indicator is a valid memory address indicator and is stored in a user bit or a parameter data field of the PTE.
6. The method of claim 1 , wherein the first indicator is stored in a present bit or a present parameter data field of the PTE.
7. The method of claim 1 , wherein at least one kernel associated background process performs one or more post-page fault handling operations periodically, wherein the one or more post-page fault handling operations includes updating one or more counters of the pre-allocation table, adding one or more virtual memory pages to a last recently used (LRU) cache for swapping, or allocating one or more pre-allocated pages to replace used pre-allocated pages associated with the pre-allocation table.
8. The method of claim 1 , wherein at least one kernel associated background process performs one or more operations of pre-allocating pages dynamically based on at least one threshold value or trigger associated with a number of available pre-allocated pages.
9. The method of claim 1 , wherein the page fault handling operations are performed without a context switch from user space to kernel space.
10. The method of claim 1 , wherein the page fault handling operations, pre-page fault handling operations, and/or post-page fault handling operations are performed using a kernel associated delayed work queue.
11. The method of claim 1 , wherein at least one kernel associated background process performs one or more error handling operations, wherein the one or more error handling operations includes scanning one or more pre-allocation tables for entries associated with one or more applications and performing one or more post-page fault handling operations for each of the entries associated with the one or more applications.
12. A system for performing page fault handling, the system comprising:
at least one processor; and
a page fault handling offload engine (POE) implemented using the at least one processor, wherein the POE is configured for performing page fault handling operations, the page fault handling operations comprising:
after a translation lookaside buffer (TLB) miss associated with a virtual memory page occurs, identifying, in a page table, a page table entry (PTE) associated with the virtual memory page;
determining, using a first indicator in the PTE, that the virtual memory page is not present in a main memory;
determining, using a second indicator in the PTE, that the virtual memory page is associated with a valid memory address and that the virtual memory page is capable of using pre-allocated pages;
obtaining, from a pre-allocation table, a page frame number associated with a pre-allocated page; and
updating the PTE to indicate the page frame number.
13. The system of claim 12 , wherein at least one kernel associated background process performs one or more pre-page fault handling operations asynchronously.
14. The system of claim 13 , wherein one of the pre-page fault handling operations comprises:
pre-allocating virtual memory pages and storing corresponding page frame numbers in the pre-allocation table.
15. The system of claim 13 , wherein one of the pre-page fault handling operations comprises:
determining whether PTEs associated with a virtual memory region refer to valid memory addresses and for setting valid memory address indicators in the PTEs associated with the virtual memory region.
16. The system of claim 12 , wherein the second indicator is a valid memory address indicator and is stored in a user bit or a parameter data field of the PTE.
17. The system of claim 12 , wherein at least one kernel associated background process performs one or more post-page fault handling operations periodically, wherein the one or more post-page fault handling operations includes updating one or more counters of the pre-allocation table, adding one or more virtual memory pages to a last recently used (LRU) cache for swapping, or allocating one or more pre-allocated pages to replace used pre-allocated pages associated with the pre-allocation table.
18. The system of claim 12 , wherein the page fault handling operations, pre-page fault handling operations, and/or post-page fault handling operations are performed using a kernel associated delayed work queue.
19. The system of claim 12 , wherein at least one kernel associated background process performs one or more error handling operations, wherein the one or more error handling operations includes scanning one or more pre-allocation tables for entries associated with one or more applications and performing one or more post-page fault handling operations for each of the entries associated with the one or more applications.
20. A non-transitory computer readable medium having stored thereon executable instructions that when executed by a processor of a computer cause the computer to perform page fault handling operations comprising:
after a translation lookaside buffer (TLB) miss associated with a virtual memory page occurs, identifying, in a page table, a page table entry (PTE) associated with the virtual memory page;
determining, using a first indicator in the PTE, that the virtual memory page is not present in a main memory;
determining, using a second indicator in the PTE, that the virtual memory page is associated with a valid memory address and that the virtual memory page is capable of using pre-allocated pages;
obtaining, from a pre-allocation table, a page frame number associated with a pre-allocated page; and
updating the PTE to indicate the page frame number.