Liquid crystal display apparatus and method of manufacturing the same
A liquid crystal display apparatus includes a shift register unit that sequentially takes in a video signal including s-bit width for the number of columns of a plurality of pixels, a 1-line latch unit that concurrently outputs a plurality of the video signals taken by the shift register unit, comparator units that convert the plurality of video signals output from the 1-line latch unit into a plurality of analog voltages, respectively, and an analog switch unit that switches whether or not the plurality of analog voltages are supplied to the plurality of data lines, respectively.
1. A liquid crystal display apparatus for an optical switching element, the liquid crystal display apparatus comprising:
a plurality of pixels;
a plurality of data lines provided so as to correspond to respective columns of the plurality of pixels;
a shift register unit configured to sequentially take in a video signal including s bit width for a number of columns of the plurality of pixels, s being an integer greater than or equal to 2;
a latch unit configured to concurrently output a plurality of the video signals taken by the shift register unit;
a plurality of comparators configured to convert the plurality of video signals output from the latch unit into a plurality of analog voltages, respectively; and
an analog switch unit configured to switch whether or not the plurality of analog voltages are supplied to the plurality of data lines, respectively, wherein
the shift register unit comprises first to s-th shift register circuits configured to sequentially take in first to s-th bit signals constituting the video signals including the s-bit width for the number of columns of the plurality of pixels, respectively,
the latch unit comprises first to s-th latch circuits configured to concurrently output the first to s-th bit signals for the number of columns of the plurality of pixels taken by the first to s-th register circuits, respectively, and
among the first to s-th latch circuits, the first latch circuit configured to concurrently output a plurality of the first bit signals, which are bit signals of a least significant bit, is disposed closer to the plurality of comparators and the analog switch unit than the s-th latch circuit configured to concurrently output the plurality of s-th bit signals, which are bit signals of a most significant bit, and operating frequencies of the first bit signals are lower than the operating frequencies when the liquid crystal display apparatus is used for image display.
2. The liquid crystal display apparatus for the optical switching element according to claim 1 , wherein the first latch circuit is disposed in such a way that a plurality of signal lines wired from the first latch circuit to the respective plurality of comparators become shorter than at least a plurality of signal lines wired from the s-th latch circuit to the respective plurality of comparators.
3. The liquid crystal display apparatus for the optical switching element according to claim 1 , wherein the first latch circuit is disposed closer to the plurality of comparators than a second to the s-th latch circuits are.
4. The liquid crystal display apparatus for the optical switching element according to claim 3 , wherein
the first latch circuit is disposed in such a way that a plurality of signal lines wired from the first latch circuit to the respective plurality of comparators become shorter than a plurality of signal lines wired from the second to s-th latch circuits to the respective plurality of comparators.
5. The liquid crystal display apparatus for the optical switching element according to claim 1 , wherein the first latch circuit is disposed closer to the plurality of comparators and the analog switch unit than a distance from each of a second to the s-th latch circuits to the plurality of comparators and the analog switch unit.
6. A method of manufacturing a liquid crystal display apparatus for an optical switching element, the liquid crystal display apparatus comprising:
a plurality of pixels;
a plurality of data lines provided so as to correspond to respective columns of the plurality of pixels;
a shift register unit configured to sequentially take in a video signal including s bit width for a number of columns of the plurality of pixels, s being an integer greater than or equal to 2;
a latch unit configured to concurrently output a plurality of the video signals taken by the shift register unit;
a plurality of comparators configured to convert the plurality of video signals output from the latch unit into a plurality of analog voltages, respectively; and
an analog switch unit configured to switch whether or not the plurality of analog voltages are supplied to the plurality of data lines, respectively, wherein
the shift register unit comprises first to s-th shift register circuits configured to sequentially take in first to s-th bit signals constituting the video signals including the s-bit width for the number of columns of the plurality of pixels, respectively,
the latch unit comprises first to s-th latch circuits configured to concurrently output the first to s-th bit signals for the number of columns of the plurality of pixels taken by the first to s-th register circuits, respectively, the method comprising
disposing, among the first to s-th latch circuits, the first latch circuit configured to concurrently output a plurality of the first bit signals, which are bit signals of a least significant bit, closer to the plurality of comparators and the analog switch unit than the s-th latch circuit configured to concurrently output the plurality of s-th bit signals, which are bit signals of a most significant bit, and operating frequencies of the first bit signals are lower than the operating frequencies when the liquid crystal display apparatus is used for image display.
7. The method according to claim 6 , wherein, in the disposing of the first latch circuit, the first latch circuit is disposed in such a way that a plurality of signal lines wired from the first latch circuit to the respective plurality of comparators become shorter than at least a plurality of signal lines wired from the s-th latch circuit to the respective plurality of comparators.