IP Library › Granted Patent US 12,248,848
Granted Patent B2
US 12,248,848 · App. 17/340,173 · Granted Mar 11, 2025

Scalable gate control in quantum circuit assemblies

Inventors: Sushil Subramanian (Hillsboro, OR); Stefano Pellerano (Beaverton, OR); Ravi Pillarisetty (Portland, OR); Jong Seok Park (Hillsboro, OR); Todor M. Mladenov (Portland, OR)
Assignee: Intel Corporation
G06N10/00H03M1/66
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Quick Facts
Patent No.
US 12,248,848
App. No.
17/340,173
Granted
Mar 11, 2025
Kind
B2
Abstract

Quantum circuit assemblies that employ active pulse shaping in order to be able to control states of a plurality of qubits with signal pulses propagated over a shared signal propagation channel are disclosed. An example quantum circuit assembly includes a quantum circuit component that includes a first qubit, associated with a first frequency to control the state of the first qubit, and a second qubit, associated with a second frequency to control the state of the second qubit. A shared transmission channel is coupled to the first and second qubits. The assembly further includes a signal pulse generation circuit, configured to generate a signal pulse to be propagated over the shared transmission channel to control the state of the first qubit, where the signal pulse has a center frequency at the first frequency, a bandwidth that includes the second frequency, and a notch at the second frequency.

Claims (81)

1. A quantum circuit assembly, comprising:

a signal path, comprising a first capacitor and a second capacitor, where the first capacitor is coupled to a terminal of a qubit device of the quantum circuit assembly; and

a switch arrangement, to operate the signal path in one of a first phase, a second phase, or a third phase, wherein:

in the first phase, the first capacitor is to charge to a first voltage, and the second capacitor is decoupled from the first capacitor,

in the second phase, the second capacitor is to charge to a second voltage, and the second capacitor is decoupled from the first capacitor, and

in the third phase, the second capacitor is coupled to the first capacitor.

2. The quantum circuit assembly according to claim 1 , wherein, in the third phase, the second capacitor is coupled in series with the first capacitor.

3. The quantum circuit assembly according to claim 1 , wherein, in the first phase:

a first capacitor electrode of the first capacitor is coupled to the terminal,

a second capacitor electrode of the first capacitor is coupled to a reference potential, and

a first signal source is coupled to the first capacitor electrode of the first capacitor,

wherein the first signal source is a signal source to provide a signal to charge the first capacitor to the first voltage.

4. The quantum circuit assembly according to claim 3 , wherein the first signal source includes a first digital-to-analog converter (DAC).

5. The quantum circuit assembly according to claim 3 , wherein:

the qubit device is one of one or more qubit devices that include a plurality of terminals,

the terminal is a first terminal of the plurality of terminals,

the signal path is one of a plurality of signal paths, each comprising a respective pair of the first capacitor and the second capacitor,

the first capacitors of different ones of the plurality of signal paths are coupled to different ones of the plurality of terminals,

the quantum circuit assembly further includes a first multiplexer having an input coupled to an output of the first signal source, and

the first multiplexer is to couple the output of the first signal source to the first capacitor electrode of the first capacitor of one of the signal paths when the one of the signal paths is operated in the first phase.

6. The quantum circuit assembly according to claim 3 , wherein:

the qubit device is one of one or more qubit devices that include a plurality of terminals,

the terminal is one of the plurality of terminals,

the signal path is one of a plurality of signal paths that the switch arrangement is to operate in one of the first phase, the second phase, or the third phase, where each of the plurality of signal paths includes a respective pair of the first capacitor and the second capacitor and where the first capacitors of different ones of the plurality of signal paths are coupled to different ones of the plurality of terminals,

the quantum circuit assembly further includes a first multiplexer having an input coupled to an output of the first signal source, and

the first multiplexer is to selectively couple the output of the first signal source to the first capacitor of one of the plurality of signal paths at a time.

7. The quantum circuit assembly according to claim 1 , wherein, in the second phase:

a second signal source is coupled to a first capacitor electrode of the second capacitor, and

a second capacitor electrode of the second capacitor is coupled to a reference potential,

wherein the second signal source is a signal source to provide a signal to charge the second capacitor to the second voltage.

8. The quantum circuit assembly according to claim 7 , wherein the second signal source includes a second digital-to-analog converter (DAC).

9. The quantum circuit assembly according to claim 7 , wherein:

the qubit device is one of one or more qubit devices that include a plurality of terminals,

the terminal is a first terminal of the plurality of terminals,

the signal path is one of a plurality of signal paths, each comprising a respective pair of the first capacitor and the second capacitor,

the first capacitors of different ones of the plurality of signal paths are coupled to different ones of the plurality of terminals,

the quantum circuit assembly further includes a second multiplexer having an input coupled to an output of the second signal source, and

the second multiplexer is to couple the output of the second signal source to the first capacitor electrode of the second capacitor of one of the signal paths when the one of the signal paths is operated in the second phase.

10. The quantum circuit assembly according to claim 7 , wherein:

the qubit device is one of one or more qubit devices that include a plurality of terminals,

the terminal is one of the plurality of terminals,

the signal path is one of a plurality of signal paths that the switch arrangement is to operate in one of the first phase, the second phase, or the third phase, where each of the plurality of signal paths includes a respective pair of the first capacitor and the second capacitor and where the first capacitors of different ones of the plurality of signal paths are coupled to different ones of the plurality of terminals,

the quantum circuit assembly further includes a second multiplexer having an input coupled to an output of the second signal source, and

the second multiplexer is to selectively couple the output of the second signal source to the second capacitor of one of the plurality of signal paths at a time.

11. The quantum circuit assembly according to claim 1 , wherein, in the second phase:

a first capacitor electrode of the first capacitor is coupled to the terminal, and

a second capacitor electrode of the first capacitor is coupled to a reference potential.

12. The quantum circuit assembly according to claim 1 , wherein, in the third phase:

a first capacitor electrode of the first capacitor is coupled to the terminal,

a second capacitor electrode of the first capacitor is coupled to a first capacitor electrode of the second capacitor, and

a second capacitor electrode of the second capacitor is coupled to a reference potential.

13. The quantum circuit assembly according to claim 1 , further comprising a further signal path for applying a further signal pulse to the terminal, the further signal path comprising a further first capacitor and a further second capacitor, where the further first capacitor is coupled to the terminal, wherein the switch arrangement is to operate the further signal path in one of the first phase, the second phase, or the third phase, and wherein:

in the first phase, the further first capacitor is to charge to a further first voltage, and the further second capacitor is decoupled from the further first capacitor,

in the second phase, the further second capacitor is to charge to a further second voltage, and the further second capacitor is decoupled from the further first capacitor, and

in the third phase, the further second capacitor is coupled to the further first capacitor.

14. The quantum circuit assembly according to claim 13 , wherein:

at least one of a time when the signal path is in the first phase and a time when the signal path is in the second phase at least partially overlaps with a time when the further signal path is in the third phase, or

at least one of a time when the further signal path is in the first phase and a time when the further signal path is in the second phase at least partially overlaps with a time when the signal path is in the third phase.

15. A quantum circuit assembly, comprising:

a first capacitor, coupled to a terminal of a qubit device; and

a second capacitor, coupled to a switch arrangement that is to, in a first state, decouple the second capacitor and the first capacitor from one another, and, in a second state, couple the second capacitor and the first capacitor,

wherein:

when the switch arrangement is in the first state, the first capacitor is to store a first charge and the second capacitor is to store a second charge, and

when the switch arrangement is in the second state, at least a portion of the second charge stored in the second capacitor is to be applied to the terminal.

16. The quantum circuit assembly according to claim 15 , wherein, when the switch arrangement is in the first state;

a first capacitor electrode of the first capacitor is coupled to a first signal source, wherein the first signal source is to provide a signal to cause the first capacitor to store the first charge, and

a second capacitor electrode of the first capacitor is coupled to a reference potential.

17. The quantum circuit assembly according to claim 15 , wherein, when the switch arrangement is in the first state;

a first capacitor electrode of the second capacitor is coupled to a second signal source, wherein the second signal source is to provide a signal to cause the second capacitor to store the second charge, and

a second capacitor electrode of the second capacitor is coupled to a reference potential.

18. The quantum circuit assembly according to claim 15 , wherein, when the switch arrangement is in the second state:

a first capacitor electrode of the first capacitor is coupled to the terminal,

a second capacitor electrode of the first capacitor is coupled to a first capacitor electrode of the second capacitor, and

a second capacitor electrode of the second capacitor is coupled to a reference potential.

19. A method of operating a quantum circuit assembly that includes a first capacitor and a second capacitor, where the first capacitor is coupled to a terminal of a qubit device, the method comprising:

in a first phase, decoupling the second capacitor and the first capacitor, and configuring the first capacitor to charge to a first voltage;

in a second phase, decoupling the second capacitor and the first capacitor, and configuring the second capacitor to charge to a second voltage;

in a third phase, coupling the second capacitor and the first capacitor.

20. The method according to claim 19 , wherein, in the third phase, the second capacitor and the first capacitor are:

either coupled to apply a voltage indicative of a sum of the first voltage and the second voltage,

or coupled to apply a voltage indicative of a difference between the first voltage and the second voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2021
From: SUBRAMANIAN, SUSHIL; PELLERANO, STEFANO; PILLARISETTY, RAVI; PARK, JONG SEOK; MLADENOV, TODOR M.
To: INTEL CORPORATION
Reel/Frame 056451/0406 →
Continuity (1)
Related Publication 20220391738A1 · Dec 8, 2022
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