IP Library Granted Patent US 11,720,733
Granted Patent B2
US 11,720,733 · App. 17/340,825 · Granted Aug 8, 2023

Integrated circuit design system and method

Inventors: Evan Jeffrey (Santa Barbara, CA); Julian Shaw Kelly (Santa Barbara, CA); Joshua Yousouf Mutus (Santa Barbara, CA)
Assignee: Google LLC
G06F30/39G06F30/327G06F30/33G06F30/337G06F30/392G06F30/398G06F2111/02G06F2111/04
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Quick Facts
Patent No.
US 11,720,733
App. No.
17/340,825
Granted
Aug 8, 2023
Kind
B2
Abstract

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for parameterization of physical dimensions of discrete circuit components for component definitions that define discrete circuit components. The component definitions may be selected for use in a device design. When a parametrization of a particular version of a discrete circuit component definition is changed, the version level of the device design is also changed and the circuit layout for the device design is physically verified for the new version level.

Claims (47)

1. A computer-implemented method, comprising:

accessing a device design stored in a data store, the device design including device metadata describing:

a set of components included in a device, and, for each component, a version level of the component, wherein each component is defined by a component definition, each component definition defining the component for use in an electronic circuit and including component metadata describing a component type of the component defined by the component definition, geometric parameterization data defining physical dimensions of a physical realization of the component in one or more layers of an electronic circuit, a version level of the component described by the component definition, wherein for at least two version levels for a particular component define for the particular component different physical dimensions defined by their respective geometric parameterization data; and

a network list describing, for each of the components, circuit connections of the set of components included in the device; and

a first version level for the device design, each version level defining a unique combination of the network list, set of components, and version levels of the components, wherein the first version level specifies a first version level of the particular component;

selecting, by user input, a second version level for a particular component, the second version level specifying geometric parameterization data defining physical dimensions of the physical realization of the component that defines different physical dimensions of a physical realization of the particular component that is different from the physical dimensions of the physical realization of the particular component in the first version level; and

in response to selecting the second version of the particular component, generating a second version level for the device design and a circuit layout for the second version level for the device design based on the set of components and circuit connections of the components included in the device based on the network list, and physically verifying the circuit layout for the second version level.

2. The method of claim 1 , wherein the parameterization data defines, for each layer of each of one or more layers, element geometries for each circuit element of a component.

3. The method of claim 2 , wherein the circuit elements includes conductive traces and non-conductive gaps between traces.

4. The method of claim 2 , wherein the parameterization data further defines, for each layer of each of one or more layers, dispositions of element geometries from each other in each circuit element of a component.

5. The method of claim 1 , wherein the components include fluxmon qubits.

6. A non-transitory, tangible computer storage medium encoded with a computer program, the program comprising instructions that when executed by data processing apparatus cause the data processing apparatus to perform operations comprising:

accessing a device design stored in a data store, the device design including device metadata describing:

a set of components included in a device, and, for each component, a version level of the component, wherein each component is defined by a component definition, each component definition defining the component for use in an electronic circuit and including component metadata describing a component type of the component defined by the component definition, geometric parameterization data defining physical dimensions of a physical realization of the component in one or more layers of an electronic circuit, a version level of the component described by the component definition, wherein for at least two version levels for a particular component define for the particular component different physical dimensions defined by their respective geometric parameterization data; and

a network list describing, for each of the components, circuit connections of the set of components included in the device; and

a first version level for the device design, each version level defining a unique combination of the network list, set of components, and version levels of the components, wherein the first version level specifies a first version level of the particular component;

selecting, by user input, a second version level for a particular component, the second version level specifying geometric parameterization data defining physical dimensions of the physical realization of the component that defines different physical dimensions of a physical realization of the particular component that is different from the physical dimensions of the physical realization of the particular component in the first version level; and

in response to selecting the second version of the particular component, generating a second version level for the device design and a circuit layout for the second version level for the device design based on the set of components and circuit connections of the components included in the device based on the network list, and physically verifying the circuit layout for the second version level.

7. The non-transitory, tangible computer storage medium of claim 6 , wherein the parameterization data defines, for each layer of each of one or more layers, element geometries for each circuit element of a component.

8. The non-transitory, tangible computer storage medium of claim 7 , wherein the circuit elements includes conductive traces and non-conductive gaps between traces.

9. The non-transitory, tangible computer storage medium of claim 7 wherein the parameterization data further defines, for each layer of each of one or more layers, dispositions of element geometries from each other in each circuit element of a component.

10. The non-transitory, tangible computer storage medium of claim 6 , wherein the components include fluxmon qubits.

11. A system, comprising:

a data processing apparatus; and

a non-transitory, tangible computer storage medium encoded with a computer program, the program comprising instructions that when executed by the data processing apparatus cause the data processing apparatus to perform operations comprising:

accessing a device design stored in a data store, the device design including device metadata describing:

a set of components included in a device, and, for each component, a version level of the component, wherein each component is defined by a component definition, each component definition defining the component for use in an electronic circuit and including component metadata describing a component type of the component defined by the component definition, geometric parameterization data defining physical dimensions of a physical realization of the component in one or more layers of an electronic circuit, a version level of the component described by the component definition, wherein for at least two version levels for a particular component define for the particular component different physical dimensions defined by their respective geometric parameterization data; and

a network list describing, for each of the components, circuit connections of the set of components included in the device; and

a first version level for the device design, each version level defining a unique combination of the network list, set of components, and version levels of the components, wherein the first version level specifies a first version level of the particular component;

selecting, by user input, a second version level for a particular component, the second version level specifying geometric parameterization data defining physical dimensions of the physical realization of the component that defines different physical dimensions of a physical realization of the particular component that is different from the physical dimensions of the physical realization of the particular component in the first version level; and

in response to selecting the second version of the particular component, generating a second version level for the device design and a circuit layout for the second version level for the device design based on the set of components and circuit connections of the components included in the device based on the network list, and physically verifying the circuit layout for the second version level.

12. The system of claim 11 , wherein the parameterization data defines, for each layer of each of one or more layers, element geometries for each circuit element of a component.

13. The system of claim 12 , wherein the circuit elements includes conductive traces and non-conductive gaps between traces.

14. The system of claim 12 , wherein the parameterization data further defines, for each layer of each of one or more layers, dispositions of element geometries from each other in each circuit element of a component.

15. The system of claim 11 , wherein the components include fluxmon qubits.

16. A computer-implemented method, comprising:

accessing a device design stored in a data store, the device design including device metadata describing:

a set of components included in a device, and, for each component, a version level of the component, wherein each component is defined by a component definition, each component definition defining the component for use in an electronic circuit and including component metadata describing a component type of the component defined by the component definition, geometric parameterization data defining physical dimensions of a physical realization of the component in one or more layers of an electronic circuit, a version level of the component described by the component definition, wherein for at least two version levels for a particular component define for the particular component different physical dimensions defined by their respective geometric parameterization data; and

a network list describing, for each of the components, circuit connections of the set of components included in the device; and

a first version level for the device design, each version level defining a unique combination of the network list, set of components, and version levels of the components, wherein the first version level specifies a first version level of the particular component;

modifying, by user input, the device design; and

in response to modifying the device design, generating a second version level for the device design and a circuit layout for the second version level for the device design based on the set of components and circuit connections of the components included in the device based on the network list, and physically verifying the circuit layout for the second version level.

17. The method of claim 16 , wherein modifying the device design comprises modifying, by user input, a selected component by changing the geometric parameterization data defining physical dimensions of the physical realization of the component to generate new geometric parameterization data that defines new physical dimensions of a physical realization of the component and generating a new version level for the component based on the changed geometric parameterization data.

18. The method of claim 17 , wherein the parameterization data defines, for each layer of each of one or more layers, element geometries for each circuit element of a component.

19. The method of claim 18 , wherein the circuit elements include conductive traces and non-conductive gaps between traces.

20. The method of claim 18 , wherein the parameterization data further defines, for each layer of each of one or more layers, dispositions of element geometries from each other in each circuit element of a component.

21. The method of claim 17 , wherein the components include fluxmon qubits.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2021
From: JEFFREY, EVAN; KELLY, JULIAN SHAW; MUTUS, JOSHUA YOUSOUF
To: GOOGLE INC.
Reel/Frame 056576/0001 →
CHANGE OF NAME Recorded Jun 17, 2021
From: GOOGLE INC.
To: GOOGLE LLC
Reel/Frame 056617/0816 →
Continuity (2)
Continuation 16470593
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