IP Library › Granted Patent US 11,538,420
Granted Patent B2
US 11,538,420 · App. 17/354,625 · Granted Dec 27, 2022

Display device having a circular display area and non-display area with demux circuit

Inventors: Minchae Kwak (Seoul, KR); Kyeonghwa Kim (Asan-si, KR); Mihae Kim (Asan-si, KR); Kyonghwan Oh (Seoul, KR); Sumi Jang (Asan-si, KR); Seunghan Jo (Seoul, KR); Jae-Ho Choi (Seoul, KR)
G09G3/3275H01L27/326G09G2310/0297
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Quick Facts
Patent No.
US 11,538,420
App. No.
17/354,625
Granted
Dec 27, 2022
Kind
B2
Abstract

A display device may include a substrate including a circular display area and a non-display area, a plurality of pixels including a first pixel and a second pixel disposed on the display area of the substrate, a first sub-demux circuit connected to the first pixel and disposed on the non-display area, a second sub-demux circuit connected to the second pixel and disposed on the non-display area, a first connection line connected to the first sub-demux circuit and the second sub-demux circuit and disposed on the non-display area to transfer first and second data input signals to the first and second sub-demux circuits, and a plurality of gate stages connected to the pixels and disposed on the non-display area to transfer gate signals to the pixels. Some of the gate stages are disposed between the first sub-demux circuit and the second sub-demux circuit.

Claims (54)

1. A display device comprising:

a substrate including a circular display area and a non-display area surrounding the display area;

a plurality of pixels including a first pixel and a second pixel disposed on the display area of the substrate;

a first sub-demux circuit connected to the first pixel and disposed on the non-display area to transfer a first data output signal to the first pixel;

a second sub-demux circuit connected to the second pixel and disposed on the non-display area to transfer a second data output signal to the second pixel;

a first connection line connected to the first sub-demux circuit and the second sub-demux circuit and disposed on the non-display area to transfer a first data input signal to the first sub-demux circuit and transfer a second data input signal to the second sub-demux circuit;

a plurality of gate stages connected to the pixels and disposed on the non-display area to transfer gate signals to the pixels,

wherein some of the gate stages are disposed between the first sub-demux circuit and the second sub-demux circuit; and

a plurality of light emitting stages connected to the pixels and disposed on the non-display area to transfer light emitting signals to the pixels,

wherein some of the light emitting stages are disposed between the first sub-demux circuit and the second sub-demux circuit.

2. The display device of claim 1 , wherein the first pixel is disposed in a first pixel column, and the second pixel is disposed in a second pixel column.

3. The display device of claim 1 , wherein the first pixel includes first, second, and third sub-pixels, the second pixel includes fourth, fifth, and sixth sub-pixels, and the first connection line includes first, second, and third sub-connection lines.

4. The display device of claim 3 , wherein the first sub-connection line is connected to the first sub-pixel and the fourth sub-pixel, and transfers a data output signal to the first sub-pixel and the fourth sub-pixel, the second sub-connection line is connected to the second sub-pixel and the fifth sub-pixel, and transfers the data output signal to the second sub-pixel and the fifth sub-pixel, and the third sub-connection line is connected to the third sub-pixel and the sixth sub-pixel, and transfers the data output signal to the third sub-pixel and the sixth sub-pixel.

5. The display device of claim 3 , wherein the first sub-connection line is connected to a first switching transistor connected to the first sub-pixel and a second switching transistor connected to the fourth sub-pixel, the second sub-connection line is connected to a third switching transistor connected to the second sub-pixel and a fourth switching transistor connected to the fifth sub-pixel, and the third sub-connection line is connected to a fifth switching transistor connected to the third sub-pixel and a sixth switching transistor connected to the sixth sub-pixel.

6. The display device of claim 5 , further comprising:

a first transfer line for transferring a first gate-on signal to the first switching transistor, the third switching transistor, and the fifth switching transistor.

7. The display device of claim 6 , further comprising:

a second transfer line for transferring a second gate-on signal to the second switching transistor, the fourth switching transistor, and the sixth switching transistor.

8. The display device of claim 7 , wherein the first gate-on signal and the second gate-on signal are selectively transferred.

9. A display device comprising:

a substrate including a circular display area and a non-display area surrounding the display area;

a plurality of pixels including a first pixel, a second pixel, a third pixel and a fourth pixel disposed on the display area of the substrate;

a first sub-demux circuit connected to the first pixel and disposed on the non-display area to transfer a first data output signal to the first pixel;

a second sub-demux circuit connected to the second pixel and disposed on the non-display area to transfer a second data output signal to the second pixel;

a first connection line connected to the first sub-demux circuit and the second sub-demux circuit and disposed on the non-display area to transfer a first data input signal to the first sub-demux circuit and transfer a second data input signal to the second sub-demux circuit;

a plurality of gate stages connected to the pixels and disposed on the non-display area to transfer gate signals to the pixels,

wherein some of the gate stages are disposed between the first sub-demux circuit and the second sub-demux circuit;

a third sub-demux circuit connected to the third pixel and disposed on the non-display area to transfer a third data output signal to the third pixel;

a fourth sub-demux circuit connected to the fourth pixel and disposed on the non-display area to transfer a fourth data output signal to the fourth pixel; and

a second connection line connected to the third sub-demux circuit and the fourth sub-demux circuit and disposed on the non-display area to transfer a third data input signal to the third sub-demux circuit and transfer a fourth data input signal to the fourth sub-demux circuit, and

wherein another of the gate stages are disposed between the second sub-demux circuit and the third sub-demux circuit, and still another of the gate stages are disposed between the third sub-demux circuit and the fourth sub-demux circuit.

10. The display device of claim 9 , wherein the first pixel is disposed in a first pixel column, and the second pixel is disposed in a second pixel column, the third pixel is disposed in a third pixel column, and the fourth pixel is disposed in a fourth pixel column.

11. The display device of claim 9 , wherein a distance between the first sub-demux circuit and the second sub-demux circuit connected to the first connection line is different from a distance between the third sub-demux circuit and the fourth sub-demux circuit connected to the second connection line.

12. The display device of claim 9 , further comprising:

a plurality of light emitting stages connected to the pixels to transfer light emitting signals to the pixels,

wherein some of the light emitting stages are disposed between the first sub-demux circuit and the second sub-demux circuit, another of the light emitting stages are disposed between the second sub-demux circuit and the third sub-demux circuit, and still another of the light emitting stages are disposed between the third sub-demux circuit and the fourth sub-demux circuit.

13. The display device of claim 9 , wherein the third pixel includes first, second, and third sub-pixels, the fourth pixel includes fourth, fifth, and sixth sub-pixels, and the second connection lines include first, second, and third sub-connection lines.

14. The display device of claim 13 , wherein the first sub-connection line is connected to the first sub-pixel and the fourth sub-pixel, and transfers a data output signal to the first sub-pixel and the fourth sub-pixel, the second sub-connection line is connected to the second sub-pixel and the fifth sub-pixel, and transfers the data output signal to the second sub-pixel and the fifth sub-pixel, and the third sub-connection line is connected to the third sub-pixel and the sixth sub-pixel, and transfers the data output signal to the third sub-pixel and the sixth sub-pixel.

15. The display device of claim 13 , wherein the first sub-connection line is connected to a first switching transistor connected to the first sub-pixel and a second switching transistor connected to the fourth sub-pixel, the second sub-connection line is connected to a third switching transistor connected to the second sub-pixel and a fourth switching transistor connected to the fifth sub-pixel, and the third sub-connection line is connected to a fifth switching transistor connected to the third sub-pixel and a sixth switching transistor connected to the sixth sub-pixel.

16. The display device of claim 15 , further comprising:

a first transfer line for transferring a first gate-on signal to the first switching transistor, the third switching transistor, and the fifth switching transistor.

17. The display device of claim 16 , further comprising:

a second transfer line for transferring a second gate-on signal to the second switching transistor, the fourth switching transistor, and the sixth switching transistor.

18. The display device of claim 17 , wherein the first gate-on signal and the second gate-on signal are selectively transferred.

19. A display device comprising:

a substrate including a circular display area and a non-display area surrounding the display area;

first to n-th pixels disposed on the display area of the substrate, where, n is a natural number of 3 or more;

first to n-th sub-demux circuits each connected to the first to n-th pixels and disposed on the non-display area to transfer first to n-th data output signals to the first to n-th pixels, respectively;

a connection line connected to the first to n-th sub-demux circuits and disposed on the non-display area to transfer n-th data input signals to the first to n-th sub-demux circuits, respectively; and

a plurality of gate stages each connected to the first to n-th pixels and disposed between the first sub-demux circuit and the n-th sub-demux circuit to transfer gate signals to the first to n-th pixels, respectively.

20. The display device of claim 19 , wherein the first to n-th pixels are disposed in first to n-th pixel columns, respectively.

21. The display device of claim 19 , further comprising:

a plurality of light emitting stages disposed between the first sub-demux circuit and the n-th sub-demux circuit.

22. The display device of claim 19 , wherein each of the first to n-th pixels includes a plurality of sub-pixels, and the connection line includes first to third sub-connection lines.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2021
From: KWAK, MINCHAE; KIM, KYEONGHWA; KIM, MIHAE; OH, KYONGHWAN; JANG, SUMI; JO, SEUNGHAN; CHOI, JAE-HO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 056623/0686 →
Priority Claims (1)
KR 10-2020-0111600 · Sep 2, 2020 · national
Continuity (1)
Related Publication 20220068218A1 · Mar 3, 2022
Cited By (1)
US 12,490,606