Inductor and transformer semiconductor devices using hybrid bonding technology
Methods and apparatus for inductor and transformer semiconductor devices using hybrid bonding technology are disclosed. An example semiconductor device includes a first standoff substrate; a second standoff substrate adjacent the first standoff substrate; and a conductive layer adjacent at least one of the first standoff substrate or the second standoff substrate.
1 . A semiconductor device comprising:
a first silicon die including a first base semiconductor substrate and a first back-end stack, the first silicon die including a first backend layer having a first thickness that is between 0.1 and 5 micrometers;
a second silicon die including a second base semiconductor substrate and a second back-end stack, the second silicon die including a second backend layer having a second thickness that is between 0.1 and 5 micrometers;
a first standoff substrate having a first outer surface and a second outer surface opposite the first outer surface, the first standoff substrate between the first silicon die and the second silicon die, the first standoff substrate physically separate from the first silicon die, the first outer surface of the first standoff substrate in direct contact with a surface of the first silicon die via a first hybrid bond coupling, the first standoff substrate including a first single layer of material including at least one of a polymer, alumina, or aluminum nitride, the first single layer of material having a second thickness that is between 5 and 400 micrometers;
a second standoff substrate having a third outer surface and a fourth outer surface opposite the third outer surface, the second standoff substrate between the first standoff substrate and the second silicon die, the second standoff substrate physically separate from the second silicon die, the fourth outer surface of the second standoff substrate in direct contact with a surface of the second silicon die via a second hybrid bond coupling, the second standoff substrate including a second single layer of material including at least one of a polymer, alumina, or aluminum nitride, the first single layer of material having a fourth thickness that is between 5 and 400 micrometers;
a magnetic material, the magnetic material adjacent the first standoff substrate and the second standoff substrate; and
a conductive layer adjacent at least one of the first standoff substrate or the second standoff substrate.
2 . The semiconductor device of claim 1 , wherein the first standoff substrate and the second standoff substrate surround the magnetic material.
3 . The semiconductor device of claim 2 , wherein the conductive layer extends around the magnetic material.
4 . The semiconductor device of claim 2 , wherein the conductive layer extends through the magnetic material.
5 . The semiconductor device of claim 2 , wherein the magnetic material and the conductive layer include a toroid.
6 . The semiconductor device of claim 2 , wherein the magnetic material and the conductive layer implement at least one of an inductor or a transformer.
7 . The semiconductor device of claim 1 , wherein the conductive layer includes copper.
8 . The semiconductor device of claim 1 , wherein the first standoff substrate includes a first assembly and the second standoff substrate includes a second assembly, the first assembly including a chiplet or tile, and wherein the second assembly is a base assembly.
9 . A system comprising:
a processing device including:
a communications chip operable according to at least one of a 5G or 6G communication protocol; and
a semiconductor device including:
magnetic material;
a first standoff substrate and a second standoff substrate adjacent the magnetic material, the first standoff substrate connected to the second standoff substrate via a first hybrid bond coupling;
a conductive layer adjacent the magnetic material;
a first silicon die including a first base semiconductor substrate and a first back-end stack, the first silicon die connected to the first standoff substrate via a second hybrid bond coupling, the first standoff substrate between the first silicon die and the second standoff substrate, the first silicon die including a first backend layer having a first thickness that is between 0.1 and 5 micrometers, the first standoff substrate including at least one of a polymer, alumina, or aluminum nitride and having a second thickness that is between 5 and 400 micrometers; and
a second silicon die including a second base semiconductor substrate and a second back-end stack, the second silicon die connected to the second standoff substrate via a third hybrid bond coupling, the second standoff substrate between the second silicon die and the first standoff substrate, the second silicon die including a second backend layer having a third thickness that is between 0.1 and 5 micrometers, the second standoff substrate including at least one of a polymer, alumina, or aluminum nitride and having a fourth thickness that is between 5 and 400 micrometers.
10 . The system of claim 9 , wherein the first standoff substrate and the second standoff substrate surround the magnetic material.
11 . The system of claim 9 , wherein the conductive layer extends at least one of i) around the magnetic material or ii) through the magnetic material.
12 . The system of claim 9 , wherein the semiconductor device includes at least one of an inductor or a transformer.