Data output buffer and semiconductor apparatus including the same

1. A data output buffer comprising:

a first driver configured to drive a data input/output (I/O) pad according to an input signal and allow data drivability to be controlled according to an impedance calibration code; and

a second driver configured to directly receive emphasis signals and the impedance calibration code, perform a de-emphasis operation on the data I/O pad and allow de-emphasis drivability to be controlled according to the impedance calibration code.

2. The data output buffer of claim 1 , wherein the first driver includes:

a pull-up driver configured to drive the data I/O pad according to a first data signal of the input signal and allow the data drivability to be controlled according to a first impedance calibration code of the impedance calibration code; and

a pull-down driver configured to drive the data I/O pad according to a second data signal of the input signal and allow the data drivability to be controlled according to a second impedance calibration code of the impedance calibration code.

3. The data output buffer of claim 1 , wherein the second driver includes:

a pull-up driver configured to perform the de-emphasis operation according to a first emphasis signal of the emphasis signals and allow the de-emphasis drivability to be controlled according to all code bits of a first impedance calibration code of the impedance calibration code; and

a pull-down driver configured to perform the de-emphasis operation according to a second emphasis signal of the emphasis signals and allow the de-emphasis drivability to be controlled according to all code bits of a second impedance calibration code of the impedance calibration code.

4. The data output buffer of claim 1 , wherein the second driver includes:

a plurality of pull-up driving circuits configured to commonly receive a first emphasis signal of the emphasis signals and receive all code bits of a first impedance calibration code of the impedance calibration code, bit by bit, respectively; and

a plurality of pull-down driving circuits configured to commonly receive a second emphasis signal of the emphasis signals and receive all code bits of a second impedance calibration code of the impedance calibration code, bit by bit, respectively.

5. The data output buffer of claim 1 , wherein the second driver includes:

a pull-up driver configured to perform the de-emphasis operation according to a first emphasis signal of the emphasis signals and allow the de-emphasis drivability to be controlled according to partial code bits of a first impedance calibration code of the impedance calibration code; and

a pull-down driver configured to perform the de-emphasis operation according to a second emphasis signal of the emphasis signals and allow the de-emphasis drivability to be controlled according to partial code bits of a second impedance calibration code of the impedance calibration code.

6. The data output buffer of claim 1 , wherein the second driver includes:

a plurality of pull-up driving circuits configured to commonly receive a first emphasis signal of the emphasis signals and receive partial code bits of a first impedance calibration code of the impedance calibration code, bit by bit, respectively; and

a plurality of pull-down driving circuits configured to commonly receive a second emphasis signal of the emphasis signals and receive partial code bits of a second impedance calibration code of the impedance calibration code, bit by bit, respectively.

7. The data output buffer of claim 2 , wherein the second driver includes:

a pull-up driver configured to perform the de-emphasis operation by raising a voltage level of the data I/O pad when the pull-down driver of the first driver drives the data I/O pad to a low level; and

a pull-down driver configured to perform the de-emphasis operation by lowering the voltage level of the data I/O pad when the pull-up driver of the first driver drives the data I/O pad to a high level.