IP Library › Granted Patent US 12,295,223
Granted Patent B2
US 12,295,223 · App. 17/367,110 · Granted May 6, 2025

Display panel and display apparatus including the same

Inventors: Sunhwa Lee (Yongin-si, KR); Gyungsoon Park (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
H10K59/131H10K59/1213H10K59/353
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Quick Facts
Patent No.
US 12,295,223
App. No.
17/367,110
Granted
May 6, 2025
Kind
B2
Abstract

In a display panel having a main display area, a component area including pixel groups spaced apart from each other, and a transmission area between the pixel groups, the display panel includes: a substrate; a plurality of main display elements on the substrate to correspond to the main display area and main pixel circuits respectively connected to the main display elements; auxiliary display elements on the substrate to respectively correspond to the pixel groups and auxiliary pixel circuits respectively connected to the auxiliary display elements; a first data line and a second data line spaced apart from each other with the component area therebetween; and a detour line connecting the first data line to the second data line, wherein the detour line is on a layer that is closer to the substrate than a layer on which the first data line and the second data line are arranged.

Claims (47)

1. A display panel having a main display area, a component area including pixel groups spaced apart from each other, and a transmission area between the pixel groups, the display panel comprising:

a substrate;

a plurality of main display elements on the substrate to correspond to the main display area and main pixel circuits respectively connected to the main display elements;

auxiliary display elements on the substrate to respectively correspond to the pixel groups and auxiliary pixel circuits respectively connected to the auxiliary display elements;

a first data line and a second data line spaced apart from each other with the component area therebetween;

a detour line connecting the first data line to the second data line,

wherein the detour line is on a layer that is closer to the substrate than a layer on which the first data line and the second data line are arranged; and

a lower metal layer in the component area between the substrate and the auxiliary pixel circuits and including a lower hole corresponding to the transmission area,

wherein the detour line is coplanar with the lower metal layer on a plane that is parallel to a bottom surface of the substrate.

2. The display panel of claim 1 , wherein at least a portion of the detour line is in the main display area.

3. The display panel of claim 1 , further comprising a third data line in the component area and connected to the auxiliary pixel circuits.

4. The display panel of claim 1 , further comprising an initialization voltage line configured to transmit an initialization voltage to the main pixel circuits in the main display area and extending in a first direction, wherein a portion of the detour line, the portion extending in the first direction, overlaps the initialization voltage line.

5. The display panel of claim 1 , wherein a portion of the detour line extending in a second direction that is parallel to the first data line overlaps a fourth data line connecting the main pixel circuits in the main display area.

6. The display panel of claim 1 , further comprising a connection electrode between the detour line and the first data line,

wherein the connection electrode is connected to the detour line through a first contact hole, and the first data line is connected to the connection electrode through a second contact hole.

7. A display panel having a main display area, a component area including pixel groups spaced apart from each other, and a transmission area between the pixel groups, the display panel comprising:

a substrate;

main display elements on the substrate to correspond to the main display area and main pixel circuits respectively connected to the main display elements;

auxiliary display elements on the substrate to respectively correspond to the pixel groups and auxiliary pixel circuits respectively connected to the auxiliary display elements;

a lower metal layer in the component area between the substrate and the auxiliary pixel circuits and including a lower hole corresponding to the transmission area;

a first data line and a second data line apart from each other with the component area therebetween; and

a detour line connecting the first data line to the second data line,

wherein the detour line is coplanar with the lower metal layer on a plane that is parallel to a bottom surface of the substrate.

8. The display panel of claim 7 , wherein the main pixel circuits include a driving thin-film transistor, a switching thin-film transistor, and an initialization thin-film transistor, and

a portion of the detour line, the portion extending in a first direction, overlaps an initialization voltage line configured to transmit an initialization voltage to the initialization thin-film transistor.

9. The display panel of claim 8 , wherein a portion of the detour line extending in a second direction crossing the first direction at least partially overlaps a fourth data line configured to transmit a data signal to the switching thin-film transistor.

10. The display panel of claim 7 , further comprising a connection electrode between the detour line and the first data line,

wherein the connection electrode is connected to the detour line through a first contact hole, and the first data line is connected to the connection electrode through a second contact hole.

11. The display panel of claim 7 , further comprising a third data line in the component area and connected to the auxiliary pixel circuits.

12. The display panel of claim 11 , wherein the third data line is curved along a shape of the transmission area.

13. A display apparatus comprising:

a display panel having a main display area including main sub-pixels, a component area including a plurality of pixel groups, and a transmission area; and

a component below the display panel to correspond to the component area, wherein the display panel further includes:

a substrate;

main display elements on the substrate to correspond to the main display area and main pixel circuits respectively connected to the main display elements;

auxiliary display elements on the substrate to respectively correspond to the pixel groups and auxiliary pixel circuits respectively connected to the auxiliary display elements;

a first data line and a second data line apart from each other with the component area therebetween;

a detour line connecting the first data line to the second data line,

wherein the detour line is on a layer that is closer to the substrate than a layer on which the first data line and the second data line are arranged; and

a lower metal layer in the component area between the substrate and the auxiliary pixel circuits and including a lower hole corresponding to the transmission area,

wherein the detour line is coplanar with the lower metal layer on a plane that is parallel to a bottom surface of the substrate.

14. The display apparatus of claim 13 , wherein at least a portion of the detour line is in the main display area.

15. The display apparatus of claim 13 , further comprising a third data line in the component area and connected to the auxiliary pixel circuits.

16. The display apparatus of claim 13 , further comprising an initialization voltage line configured to transmit an initialization voltage to the main pixel circuits in the main display area and extending in a first direction, wherein a portion of the detour line extending in the first direction overlaps the initialization voltage line.

17. The display apparatus of claim 13 , wherein a portion of the detour line extending in a second direction that is parallel to the first data line overlaps a fourth data line connecting the main pixel circuits in the main display area.

18. The display apparatus of claim 13 , further comprising a connection electrode between the detour line and the first data line,

wherein the connection electrode is connected to the detour line through a first contact hole, and the first data line is connected to the connection electrode through a second contact hole.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2021
From: LEE, SUNHWA; PARK, GYUNGSOON
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 056747/0917 →
Priority Claims (1)
KR 10-2020-0099993 · Aug 10, 2020 · national
Continuity (1)
Related Publication 20220045160A1 · Feb 10, 2022
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