Semiconductor device and method of manufacture
A semiconductor device and manufacturing process are provided wherein a first semiconductor device is electrically connected to redistribution structures. An antenna structure is located on an opposite side of the first semiconductor device from the redistribution structures, and electrical connections separate from the first semiconductor device connect the antenna structure to the redistribution structures.
1. A semiconductor device comprising:
redistribution structures connected to external connections;
a first semiconductor device connected to the redistribution structures;
a first antenna substrate located on an opposite side of the first semiconductor device from the redistribution structures; and
electrical connections separate from the first semiconductor device, wherein the electrical connections comprise a solder material with a height at least as large as the first semiconductor device, the first semiconductor device being electrically connected to the first antenna substrate through the redistribution structures and the electrical connections, wherein the electrical connections are part of a ball grid array.
2. The semiconductor device of claim 1 , further comprising an antenna structure located within the redistribution structures.
3. The semiconductor device of claim 1 , wherein the electrical connections comprises solder.
4. The semiconductor device of claim 1 , wherein the first antenna substrate comprises a plurality of antenna structures.
5. The semiconductor device of claim 1 , further comprising a thermal via extending through the first antenna substrate.
6. The semiconductor device of claim 1 , wherein the first semiconductor device is a radio frequency chip.
7. The semiconductor device of claim 1 , wherein the first semiconductor device connected comprises a power management integrated circuit.
8. The semiconductor device of claim 7 , further comprising a second semiconductor device connected to the redistribution structures, the second semiconductor device comprising a power amplifier.
9. A semiconductor device comprising:
a first antenna substrate;
conductive connections bonded to the first antenna substrate, wherein the conductive connections are part of a ball grid array;
a redistribution layer connected to the conductive connections, a first material of the conductive connections extending from the first antenna substrate to the redistribution layer;
an encapsulant extending between the redistribution layer and the first antenna substrate; and
a semiconductor die embedded within the encapsulant.
10. The semiconductor device of claim 9 , wherein the first antenna substrate, the encapsulant, and the redistribution layer have a combined height of between about 350 μm and about 1.2 mm.
11. The semiconductor device of claim 9 , further comprising a second antenna substrate bonded to the redistribution layer.
12. The semiconductor device of claim 11 , wherein the second antenna substrate is separated from the first antenna substrate by a distance of between about 4 mm and about 10 mm.
13. The semiconductor device of claim 11 , wherein the first antenna substrate and the second antenna substrate are a single structure.
14. The semiconductor device of claim 9 , wherein the first antenna substrate extends over the semiconductor die.
15. The semiconductor device of claim 9 , wherein the conductive connections are solder balls.
16. A semiconductor device comprising:
an antenna substrate electrically connected to a through via;
an encapsulant surrounding the through via;
a semiconductor die embedded within the encapsulant, the through via having substantially straight sidewalls from a first side of the encapsulant to a second side of the encapsulant;
a redistribution structure located on an opposite side of the encapsulant from the antenna substrate;
external connections bonded to the redistribution structure; and
an antenna located adjacent to the through via.
17. The semiconductor device of claim 16 , wherein the semiconductor die is a radio frequency chip.
18. The semiconductor device of claim 16 , wherein the antenna substrate includes a plurality of upper antenna layers, one of the plurality of upper antenna layers being oriented in a different direction from another of the plurality of upper antenna layers.
19. The semiconductor device of claim 16 , wherein the encapsulant is planar with the semiconductor die.
20. The semiconductor device of claim 16 , wherein the external connections are part of a ball grid array.