Pixel with global shutter
A pixel includes a photosensitive circuit, a sense node, a first transistor and a first capacitor. A first electrode of the first capacitor is connected to a control terminal of the first transistor. A second electrode of the first capacitor is to a node of application of a first control signal.
1. A pixel, comprising:
a photosensitive circuit;
a sense node; and
a first transistor having a control terminal connected to the sense node and having a first conduction terminal connected to a node of application of a first control signal;
wherein a second conduction terminal of the first transistor is connected to an inner node, and wherein there is no bias current delivered to the second conduction terminal of the first transistor by any transistor connected to the inner node; and
circuitry configured, for each operation to store a potential level of the sense node, to apply the first control signal as a ramp signal.
2. The pixel of claim 1 , further comprising a second transistor having a control terminal coupled to the inner node, having a first conduction terminal connected to a node of application of a power supply potential, and having a second conduction terminal coupled to an output node.
3. The pixel of claim 2 , further comprising a first capacitor having a first electrode connected to the control terminal of the second transistor.
4. The pixel of claim 3 , further comprising a first storage selection transistor connected between the first electrode of the first capacitor and the inner node.
5. The pixel of claim 4 , further comprising:
a second capacitor; and
a second storage selection transistor connected between a first electrode of the second capacitor and the inner node.
6. The pixel of claim 5 , wherein a second electrode of each of the first and second capacitors is connected to a node of application of a reference potential.
7. The pixel of claim 5 , further comprising a row selection transistor connected between the second conduction terminal of the second transistor and the output node.
8. The pixel of claim 3 , further comprising:
a second capacitor; and
a first storage selection transistor connected between the first electrode of the first capacitor and a first electrode of the second capacitor;
wherein the first electrode of the second capacitor is coupled to the inner node.
9. The pixel of claim 8 , wherein a second electrode of each of the first and second capacitors is connected to a node of application of a reference potential.
10. The pixel of claim 8 , wherein the coupling of the first electrode of the second capacitor to the inner node is provided by a second storage selection transistor.
11. The pixel of claim 8 , further comprising a row selection transistor connected between the second conduction terminal of the second transistor and the output node.
12. The pixel of claim 2 , wherein:
the first transistor is a readout transistor; and
the second transistor is an output transistor.
13. The pixel of claim 2 , wherein the first control signal is a signal for controlling, through the first transistor, a potential at the inner node.
14. The pixel of claim 2 , further comprising a reset transistor having a first conduction terminal connected to the sense node, having a control terminal connected to a node of application of a reset control signal, and having a second conduction terminal connected to a first node.
15. The pixel of claim 14 , wherein the first node is a node of application of the power supply potential.
16. The pixel of claim 1 , further comprising a transfer transistor connected between the photosensitive circuit and the sense node.
17. The pixel of claim 1 , wherein said ramp signal is a progressively increasing analog ramp signal.
18. An image sensor, comprising an array of pixels, wherein each pixel comprises a pixel of claim 1 .
19. A pixel, comprising:
a photosensitive circuit;
a sense node;
a readout transistor having a control terminal coupled to the sense node, a first conduction terminal coupled to receive a ramp control signal, and a second conduction terminal coupled to an inner node;
a storage select transistor having a control terminal coupled to receive a selection signal, a first conduction terminal coupled to the inner node, and a second conduction terminal;
a capacitor having a first terminal coupled to the second conduction terminal of the storage select transistor and a second terminal coupled to a reference node; and
an output transistor having a control terminal coupled to the first terminal of the capacitor, a first conduction terminal coupled to a supply node and a second conduction terminal coupled to an output node.
20. The pixel of claim 19 , further comprising a reset transistor having a first conduction terminal coupled to the sense node, a control terminal coupled to receive a reset control signal, and a second conduction terminal coupled to the supply node.
21. The pixel of claim 19 , further comprising a row select transistor having a first conduction terminal coupled to the second conduction terminal of the output transistor, a control terminal coupled to receive a read select signal, and a second conduction terminal coupled to the output node.
22. The pixel of claim 19 , further comprising circuitry configured, for each operation to store a potential level of the sense node, to apply the ramp control signal.
23. The pixel of claim 19 , wherein said ramp control signal is a progressively increasing analog ramp signal.
24. An image sensor, comprising an array of pixels, wherein each pixel comprises a pixel of claim 19 .
25. A pixel, comprising:
a photosensitive circuit;
a sense node;
a readout transistor having a control terminal coupled to the sense node, a first conduction terminal coupled to receive a ramp control signal, and a second conduction terminal coupled to an inner node;
a first storage select transistor having a control terminal coupled to receive a first selection signal, a first conduction terminal coupled to the inner node, and a second conduction terminal coupled to a first intermediate node;
a second storage select transistor having a control terminal coupled to receive a second selection signal, a first conduction terminal coupled to the first intermediate node, and a second conduction terminal coupled to a second intermediate node;
a first capacitor having a first terminal coupled to the first intermediate node and a second terminal coupled to a reference node;
a second capacitor having a first terminal coupled to the second intermediate node and a second terminal coupled to the reference node; and
an output transistor having a control terminal coupled to the second intermediate node, a first conduction terminal coupled to a supply node and a second conduction terminal coupled to an output node.
26. The pixel of claim 25 , further comprising a reset transistor having a first conduction terminal coupled to the sense node, a control terminal coupled to receive a reset control signal, and a second conduction terminal coupled to the supply node.
27. The pixel of claim 25 , further comprising a row select transistor having a first conduction terminal coupled to the second conduction terminal of the output transistor, a control terminal coupled to receive a read select signal, and a second conduction terminal coupled to the output node.
28. The pixel of claim 25 , further comprising circuitry configured, for each operation to store a potential level of the sense node, to apply the ramp control signal.
29. The pixel of claim 25 , wherein said ramp control signal is a progressively increasing analog ramp signal.
30. An image sensor, comprising an array of pixels, wherein each pixel comprises a pixel of claim 25 .