IP Library › Granted Patent US 11,579,970
Granted Patent B2
US 11,579,970 · App. 17/375,832 · Granted Feb 14, 2023

Maintenance command interfaces for a memory system

Inventors: Danilo Caraccio (Milan, IT); Daniele Balluchi (Cernusco sul Naviglio, IT)
Assignee: Micron Technology, Inc.
G06F11/1068G06F11/076G06F11/0772G06F11/3037G06F12/0238G06F2212/7201
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Quick Facts
Patent No.
US 11,579,970
App. No.
17/375,832
Granted
Feb 14, 2023
Kind
B2
Abstract

Methods, systems, and devices for maintenance command interfaces for a memory system are described. A host system and a memory system may be configured according to a shared protocol that supports enhanced management of maintenance operations between the host system and memory system, such as maintenance operations to resolve error conditions at a physical address of a memory system. In some examples, a memory system may initiate maintenance operations based on detections performed at the memory system, and the memory system may provide a maintenance indication for the host system. In some examples, a host system may initiate maintenance operations based on detections performed at the host system. In various examples, the described maintenance signaling may include capability signaling between the host system and memory system, status indications between the host system and memory system, and other maintenance management techniques.

Claims (56)

1. A method, comprising:

receiving, at a host system from a memory system, data associated with a logical address of the memory system; and

transmitting, to the memory system and based at least in part on determining that a physical address of the memory system associated with the logical address has an error condition, a command to perform a maintenance operation associated with the logical address of the memory system.

2. The method of claim 1 , further comprising:

transmitting, to the memory system, an indication of the logical address of the memory system with the command.

3. The method of claim 1 , further comprising:

transmitting, to the memory system, an indication of a type of maintenance operation with the command.

4. The method of claim 1 , further comprising:

determining that a quantity of errors in the data or a proportion of errors in the data satisfies a threshold.

5. The method of claim 1 , further comprising:

receiving, at the host system, an indication of a capability from the memory system; and

determining a capability of the memory system to perform the maintenance operation based at least in part on receiving the indication.

6. The method of claim 5 , wherein the indication of the capability comprises an indication of whether a portion of the memory system associated with the logical address is repairable, or a quantity of available resources for repairs of the memory system, or a combination thereof.

7. The method of claim 5 , further comprising:

transmitting a query to the memory system based at least in part on determining to perform the maintenance operation, wherein receiving the indication of the capability is responsive to transmitting the query.

8. The method of claim 5 , wherein receiving the indication of the capability of the memory system comprises:

reading a register of the memory system; and

identifying a combination of bits written to the register that indicate the capability of the memory system.

9. The method of claim 1 , further comprising:

receiving, at the host system, an indication of a status of the maintenance operation.

10. The method of claim 9 , further comprising:

transmitting a request to the memory system, wherein receiving the indication of the status of the maintenance operation is responsive to transmitting the request.

11. The method of claim 1 , wherein the command indicates a time to perform the maintenance operation or a delay before performing the maintenance operation.

12. The method of claim 1 , further comprising:

determining a delay between determining to perform the maintenance operation and transmitting the command to perform the maintenance operation, wherein the command to perform the maintenance operation is transmitted in accordance with the delay.

13. The method of claim 1 , further comprising:

determining that the data is valid; and

saving the data at a location different than the physical address of the memory system based at least in part on determining that the data is valid.

14. A method, comprising:

transmitting, from a memory system to a host system, data associated with a logical address of the memory system;

receiving, at the memory system and from the host system, a command to perform a maintenance operation associated with the logical address of the memory system; and

performing the maintenance operation on a memory die of the memory system based at least in part on receiving the command to perform the maintenance operation associated with the logical address of the memory system and determining a physical address of the memory system corresponding to the logical address.

15. The method of claim 14 , further comprising:

inhibiting access operations of the memory system while performing the maintenance operation on the memory die.

16. The method of claim 14 , further comprising:

performing access operations of the memory system while performing the maintenance operation on the memory die.

17. The method of claim 14 , further comprising:

initiating, at a controller coupled with the memory die, a maintenance operation, the maintenance operation comprising copying data from one or more addresses that are in need of repair to one or more resources in or coupled with the controller and comprising remapping the one or more addresses into a second one or more resources in or coupled with the controller.

18. The method of claim 14 , wherein performing the maintenance operation comprises:

initiating a post-package repair operation on the memory die.

19. The method of claim 14 , further comprising:

receiving, at the memory system, an indication of the logical address of the memory system with the command.

20. The method of claim 14 , further comprising:

receiving, at the memory system, an indication of a type of maintenance operation with the command.

21. The method of claim 14 , further comprising:

transmitting, to the host system, an indication of a capability from the memory system, wherein receiving the command to perform the maintenance operation is based at least in part on transmitting the indication.

22. The method of claim 21 , wherein the indication of the capability comprises an indication of whether a portion of the memory system associated with the logical address is repairable, or a quantity of available resources for repairs of the memory system, or a combination thereof.

23. The method of claim 21 , further comprising:

receiving a query from the host system, wherein transmitting the indication of the capability is responsive to receiving the query.

24. The method of claim 21 wherein transmitting the indication of the capability of the memory system comprises:

transmitting, from a register of the memory system, a combination of bits written to the register that indicate the capability of the memory system.

25. The method of claim 14 , further comprising:

transmitting, to the host system, an indication of a status of the maintenance operation.

26. The method of claim 25 , further comprising:

receiving a request from the host system, wherein transmitting the indication of the status of the maintenance operation is responsive to receiving the request.

27. The method of claim 14 , wherein the command indicates a time to perform the maintenance operation or a delay before performing the maintenance operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2021
From: CARACCIO, DANILO; BALLUCHI, DANIELE
To: MICRON TECHNOLOGY, INC.
Reel/Frame 057145/0162 →
Continuity (2)
Provisional Application 63058895 · Jul 30, 2020
Related Publication 20220035701A1 · Feb 3, 2022