IP Library › Granted Patent US 11,393,400
Granted Patent B2
US 11,393,400 · App. 17/376,506 · Granted Jul 19, 2022

Pixel driving circuit including a compensation sub-circuit and driving method thereof, display device

Inventors: Xin Cao (Beijing, CN); Yawei Zhu (Beijing, CN); Heungsik Kim (Beijing, CN); Jing Hu (Beijing, CN); Zifeng Wang (Beijing, CN); Haifeng Xu (Beijing, CN); Haoyuan Fan (Beijing, CN)
Assignees: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
G09G3/3258G09G3/3266G09G3/3275G09G2310/0278
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Quick Facts
Patent No.
US 11,393,400
App. No.
17/376,506
Granted
Jul 19, 2022
Kind
B2
Abstract

A pixel driving circuit includes a reset sub-circuit configured to be turned on in response to a control signal, and transmit a reference voltage to a first node to reset a voltage of the first node; an input sub-circuit configured to transmit a data signal to a second node in response to a gate scan signal; a driving sub-circuit configured to be turned on or off in response to a voltage of the first node, write the data signal and a compensation signal into a third node, and output a driving signal according to the voltage of the first node; a compensation sub-circuit configured to transmit the data signal and the compensation signal to a fourth node in response to the gate scan signal; and a voltage control sub-circuit configured to control the voltage of the first node according to a voltage of the fourth node.

Claims (57)

1. A pixel driving circuit, comprising:

a reset sub-circuit coupled to a control signal terminal, a reference signal terminal and a first node, wherein the reset sub-circuit is configured to be turned on in response to a control signal received at the control signal terminal, and transmit a reference voltage received at the reference signal terminal to the first node to reset a voltage of the first node;

an input sub-circuit coupled to a gate scan signal terminal, a data signal terminal and a second node, wherein the input sub-circuit is configured to transmit a data signal received at the data signal terminal to the second node in response to a gate scan signal received at the gate scan signal terminal;

a driving sub-circuit coupled to the first node, the second node and a third node, wherein the driving sub-circuit is configured to be turned on or off in response to a voltage of the first node; and to write the data signal and a compensation signal into the third node;

a compensation sub-circuit coupled to the gate scan signal terminal, the third node and a fourth node, wherein the compensation sub-circuit is configured to transmit the data signal and the compensation signal to the fourth node in response to the gate scan signal; and

a voltage control sub-circuit coupled to the first node and the fourth node, wherein the voltage control sub-circuit is configured to control the voltage of the first node according to a voltage of the fourth node, and the driving sub-circuit is further configured to output a driving signal according to the voltage of the first node, wherein

the voltage control sub-circuit includes a storage capacitor, a first terminal of the storage capacitor is directly connected to the fourth node, and a second terminal of the storage capacitor is directly connected to the first node.

2. The pixel driving circuit according to claim 1 , wherein the reset sub-circuit includes a first transistor;

a control electrode of the first transistor is coupled to the control signal terminal, a first electrode of the first transistor is coupled to the reference signal terminal, and a second electrode of the first transistor is coupled to the first node.

3. The pixel driving circuit according to claim 2 , wherein the first transistor is an oxide thin film transistor.

4. The pixel driving circuit according to claim 1 , wherein the compensation sub-circuit includes a second transistor; a control electrode of the second transistor is coupled to the gate scan signal terminal, a first electrode of the second transistor is coupled to the third node, and a second electrode of the second transistor is coupled to the fourth node.

5. The pixel driving circuit according to claim 1 , wherein the input sub-circuit includes a third transistor; a control electrode of the third transistor is coupled to the gate scan signal terminal, a first electrode of the third transistor is coupled to the data signal terminal, and a second electrode of the third transistor is coupled to the second node.

6. The pixel driving circuit according to claim 1 , wherein the driving sub-circuit includes a driving transistor; a control electrode of the driving transistor is coupled to the first node, a first electrode of the driving transistor is coupled to the second node, and a second electrode of the driving transistor is coupled to the third node.

7. The pixel driving circuit according to claim 1 , further comprising a first light-emitting control sub-circuit coupled to a light-emitting control signal terminal, a first voltage terminal, and the second node, wherein the first light-emitting control sub-circuit is configured to transmit a first voltage of the first voltage terminal to the driving sub-circuit, in response to a light-emitting control signal received at the light-emitting control signal terminal.

8. The pixel driving circuit according to claim 7 , wherein the first light-emitting control sub-circuit includes a fourth transistor; a control electrode of the fourth transistor is coupled to the light-emitting control signal terminal, a first electrode of the fourth transistor is coupled to the first voltage terminal, and a second electrode of the fourth transistor is coupled to the second node.

9. The pixel driving circuit according to claim 7 , further comprising a second light-emitting control sub-circuit coupled to the light-emitting control signal terminal and the third node, wherein

the second light-emitting control sub-circuit is configured to be further coupled to a light-emitting device, and is further configured to make the driving sub-circuit and the light-emitting device form a conductive path in response to the light-emitting control signal received at the light-emitting control signal terminal, so that the driving signal is transmitted to the light-emitting device.

10. The pixel driving circuit according to claim 9 , wherein the second light-emitting control sub-circuit includes a fifth transistor; a control electrode of the fifth transistor is coupled to the light-emitting control signal terminal, a first electrode of the fifth transistor is coupled to the third node, and a second electrode of the fifth transistor is configured to be coupled to the light-emitting device.

11. The pixel driving circuit according to claim 9 , further comprising an initialization sub-circuit coupled to a first reset signal terminal, a second reset signal terminal, an initialization signal terminal, and the fourth node, wherein

the initialization sub-circuit is configured to be further coupled to the light-emitting device, and is further configured to: transmit an initialization signal received at the initialization signal terminal to the fourth node in response to a first reset signal received at the first reset signal terminal, and transmit the initialization signal to the light-emitting device in response to a second reset signal received at the second reset signal terminal.

12. The pixel driving circuit according to claim 11 , wherein the initialization sub-circuit includes a sixth transistor and a seventh transistor;

a control electrode of the sixth transistor is coupled to the first reset signal terminal, a first electrode of the sixth transistor is coupled to the initialization signal terminal, and a second electrode of the sixth transistor is coupled the fourth node; and

a control electrode of the seventh transistor is coupled to the second reset signal terminal, a first electrode of the seventh transistor is coupled to the initialization signal terminal, and a second electrode of the seventh transistor is configured to be coupled to the light-emitting device.

13. The pixel driving circuit according to claim 1 , further comprising an initialization sub-circuit coupled to a first reset signal terminal, a second reset signal terminal, an initialization signal terminal, the third node and the fourth node, and the third node being further electrically connected to a light-emitting device, wherein

the initialization sub-circuit is configured to: transmit an initialization signal received at the initialization signal terminal to the fourth node in response to a first reset signal received at the first reset signal terminal, and transmit the initialization signal to the light-emitting device in response to a second reset signal received at the second reset signal terminal.

14. The pixel driving circuit according to claim 13 , wherein the initialization sub-circuit includes a sixth transistor and a seventh transistor;

a control electrode of the sixth transistor is coupled to the first reset signal terminal, a first electrode of the sixth transistor is coupled to the initialization signal terminal, and a second electrode of the sixth transistor is coupled the fourth node; and

a control electrode of the seventh transistor is coupled to the second reset signal terminal, a first electrode of the seventh transistor is coupled to the initialization signal terminal, and a second electrode of the seventh transistor is coupled to the third node.

15. The pixel driving circuit according to claim 1 , further comprising: a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, and an initialization sub-circuit, wherein

the reset sub-circuit includes a first transistor; the input sub-circuit includes a third transistor; the driving sub-circuit includes a driving transistor; the compensation sub-circuit includes a second transistor; the first light-emitting control sub-circuit includes a fourth transistor; the second light-emitting control sub-circuit includes a fifth transistor; and the initialization sub-circuit includes a sixth transistor and a seventh transistor;

a control electrode of the driving transistor is coupled to the first node, a first electrode of the driving transistor is coupled to the second node, and a second electrode of the driving transistor is coupled to the third node;

a control electrode of the first transistor is coupled to the control signal terminal, a first electrode of the first transistor is coupled to the reference signal terminal, and a second electrode of the first transistor is coupled to the first node;

a control electrode of the third transistor is coupled to the gate scan signal terminal, a first electrode of the third transistor is coupled to the data signal terminal, and a second electrode of the third transistor is coupled to the second node;

a control electrode of the second transistor is coupled to the gate scan signal terminal, a first electrode of the second transistor is coupled to the third node, and a second electrode of the second transistor is coupled to the fourth node;

a control electrode of the fourth transistor is coupled to a light-emitting control signal terminal configured to provide a light-emitting control signal, a first electrode of the fourth transistor is coupled to a first voltage terminal configured to provide a first voltage, and a second electrode of the fourth transistor is coupled to the second node;

a control electrode of the fifth transistor is coupled to the light-emitting control signal terminal, a first electrode of the fifth transistor is coupled to the third node, and a second electrode of the fifth transistor is configured to be coupled to a light-emitting device;

a control electrode of the sixth transistor is coupled to a first reset signal terminal configured to provide a first reset signal, a first electrode of the sixth transistor is coupled to an initialization signal terminal configured to provide an initialization signal, and a second electrode of the sixth transistor is coupled to the fourth node; and

a control electrode of the seventh transistor is coupled to a second reset signal terminal configured to provide a second reset signal, a first electrode of the seventh transistor is coupled to the initialization signal terminal, and a second electrode of the seventh transistor is configured to be coupled to the light-emitting device.

16. The pixel driving circuit according to claim 15 , wherein an on-off type of the first transistor is opposite to an on-off type of the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the driving transistor.

17. A display device, comprising:

a plurality of pixel driving circuits each of which is according to the pixel driving circuit of claim 1 ; and

a plurality of light-emitting devices, wherein

the pixel driving circuit is coupled to a light-emitting device of the plurality of light-emitting devices, and the light-emitting device is further coupled to a second voltage terminal configured to provide a second voltage.

18. A driving method of the pixel driving circuit according to claim 1 , the driving method comprising:

transmitting, by the reset sub-circuit, the reference voltage received at the reference signal terminal to the first node, in response to the control signal received at the control signal terminal;

transmitting, by the input sub-circuit, the data signal received at the data signal terminal to the second node, in response to the gate scan signal received at the gate scan signal terminal;

writing, by the driving sub-circuit, the data signal and the compensation signal into the third node;

transmitting, by the compensation sub-circuit, the data signal and the compensation signal to the fourth node, in response to the gate scan signal;

controlling, by the storage capacitor, the voltage of the first node according to the voltage of the fourth node; and

outputting, by the driving sub-circuit, the driving signal according to the voltage of the first node.

19. The driving method according to claim 18 , wherein the pixel driving circuit further includes: an initialization sub-circuit, a first light-emitting control sub-circuit, and a second light-emitting control sub-circuit; the first light-emitting control sub-circuit is coupled to a light-emitting control signal terminal, a first voltage terminal and the second node; the second light-emitting control sub-circuit is coupled to the light-emitting control signal terminal and the third node, and is configured to be coupled to a light-emitting device; the initialization sub-circuit is coupled to a first reset signal terminal, a second reset signal terminal, an initialization signal terminal and the fourth node, and is configured to be coupled to the light-emitting device; and the driving method further comprises:

transmitting, by the initialization sub-circuit, an initialization signal received at the initialization signal terminal to the fourth node, in response to a first reset signal received at the first reset signal terminal;

transmitting, by the initialization sub-circuit, the initialization signal to the light-emitting device, in response to a second reset signal received at the second reset signal terminal;

transmitting, by the first light-emitting control sub-circuit, a first voltage of the first voltage terminal to the driving sub-circuit, in response to a light-emitting control signal received at the light-emitting control signal terminal; and

transmitting, by the second light-emitting control sub-circuit, the driving signal output by the driving sub-circuit according to the voltage of the first node and the first voltage to the light-emitting device, in response to the light-emitting control signal received at the light-emitting control signal terminal.

20. The driving method according to claim 19 , wherein the driving sub-circuit includes a driving transistor; and

an absolute value of a difference between the reference voltage and the first voltage is greater than an absolute value of a threshold voltage of the driving transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2021
From: CAO, XIN; ZHU, YAWEI; KIM, HEUNGSIK; HU, JING; WANG, ZIFENG; XU, HAIFENG; FAN, HAOYUAN
To: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO.,LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 056867/0040 →
Priority Claims (1)
CN 202010686292.4 · Jul 16, 2020 · national
Continuity (1)
Related Publication 20220020330A1 · Jan 20, 2022