IP Library › Granted Patent US 11,871,028
Granted Patent B2
US 11,871,028 · App. 17/376,682 · Granted Jan 9, 2024

Encoder, decoder, encoding method, and decoding method

Inventors: Kiyofumi Abe (Osaka, JP); Takahiro Nishi (Nara, JP); Tadamasa Toma (Osaka, JP); Yusuke Kato (Osaka, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
H04N19/52H04N19/109H04N19/139H04N19/176H04N19/577
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Quick Facts
Patent No.
US 11,871,028
App. No.
17/376,682
Granted
Jan 9, 2024
Kind
B2
Abstract

An encoder: generates, in an inter prediction mode, a first prediction image of a current block to be processed, based on a derived motion vector; and generates a final prediction image of the current block by applying an update process to the first prediction image. Candidates for the update process include a first process and a second process. The first process is a BDOF process. The second process is a process of mixing the first prediction image with a second prediction image generated in intra prediction for the current block. In the applying of the update process, the first process and the second process are mutually exclusively applied.

Claims (20)

1. An encoder comprising:

circuitry; and

memory coupled to the circuitry, wherein

in operation, the circuitry:

generates, in an inter prediction mode, a first prediction image of a current block to be processed, based on a derived motion vector; and

generates a final prediction image of the current block by applying an update process to the first prediction image,

candidates for the update process include a first process and a second process,

the first process is a bi-directional optical flow (BDOF) process,

the second process is a process of mixing the first prediction image with a second prediction image generated in intra prediction for the current block, and

in the applying of the update process, the first process and the second process are mutually exclusively applied.

2. A decoder comprising:

circuitry; and

memory coupled to the circuitry, wherein

in operation, the circuitry:

generates, in an inter prediction mode, a first prediction image of a current block to be processed, based on a derived motion vector; and

generates a final prediction image of the current block by applying an update process to the first prediction image,

candidates for the update process include a first process and a second process,

the first process is a bi-directional optical flow (BDOF) process,

the second process is a process of mixing the first prediction image with a second prediction image generated in intra prediction for the current block, and

in the applying of the update process, the first process and the second process are mutually exclusively applied.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2021
From: ABE, KIYOFUMI; NISHI, TAKAHIRO; TOMA, TADAMASA; KATO, YUSUKE
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 058328/0751 →
Continuity (3)
Continuation PCTJP2020004530 · Feb 6, 2020
Provisional Application 62802950 · Feb 8, 2019
Related Publication 20210344948A1 · Nov 4, 2021