IP Library Granted Patent US 11,777,302
Granted Patent B2
US 11,777,302 · App. 17/377,881 · Granted Oct 3, 2023

Leakage current blocking circuit and leakage current blocking method for decoupling capacitor

Inventor: Hung-Der Su (Hsinchu, TW)
Assignee: REALTEK SEMICONDUCTOR CORP.
H02H3/16G01R31/52G01R31/64H01H83/04
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Quick Facts
Patent No.
US 11,777,302
App. No.
17/377,881
Granted
Oct 3, 2023
Kind
B2
Abstract

A leakage current blocking circuit and a leakage current blocking method for a decoupling capacitor are provided. A first end of the decoupling capacitor is coupled to a power voltage. The leakage current blocking circuit is coupled between a second end of the decoupling capacitor and a ground voltage, and the leakage current blocking circuit includes at least one switch. The at least one switch is used to provide a channel for the decoupling capacitor to be coupled to the ground voltage when the decoupling capacitor is not damaged, and when the decoupling capacitor is damaged, the at least one switch is turned off to block a leakage current of the decoupling capacitor.

Claims (23)

1. A leakage current blocking circuit for a decoupling capacitor, wherein a first end of the decoupling capacitor is coupled to a power voltage, the leakage current blocking circuit is coupled between a second end of the decoupling capacitor and a ground voltage, and the leakage current blocking circuit comprises:

at least one switch used to provide a channel allowing the decoupling capacitor to be coupled to the ground voltage when the decoupling capacitor is not damaged; wherein the at least one switch is turned off to block a leakage current of the decoupling capacitor when the decoupling capacitor is damaged;

wherein the at least one switch is a first N-type MOSFET, a drain of the first N-type MOSFET is coupled to the second end of the decoupling capacitor, and a source of the first N-type MOSFET is coupled to the ground voltage;

wherein the leakage current blocking circuit further includes:

a second N-channel depletion-mode MOSFET, wherein a drain of the second N-channel depletion-mode MOSFET and the drain of the first N-type MOSFET are commonly coupled to the second end of the decoupling capacitor via a first node; and a source of the second N-channel depletion-mode MOSFET and a gate of the second N-channel depletion-mode MOSFET are commonly coupled to a second node; and

an inverter, wherein an input end of the inverter is coupled to the second node, and an output end of the inverter is coupled to a gate of the first N-type MOSFET.

2. The leakage current blocking circuit according to claim 1 , further comprising:

a capacitor, wherein a first end of the capacitor is coupled to the second node, and a second end of the capacitor is coupled to the ground voltage; and

a third N-channel depletion-mode MOSFET, wherein a drain of the third N-channel depletion-mode MOSFET and the first end of the capacitor are commonly coupled to the second node, and a source of the third N-channel depletion-mode MOSFET and a gate of the third N-channel depletion-mode MOSFET are commonly coupled to the ground voltage.

3. The leakage current blocking circuit according to claim 2 , wherein, when the decoupling capacitor is not damaged, a first current flowing through the second N-channel depletion-mode MOSFET is smaller than a second current flowing through the third N-channel depletion-mode MOSFET, the output end of the inverter outputs a high-voltage signal since the input end of the inverter inputs a low-voltage signal, and the high-voltage signal is used to turn on the first N-type MOSFET for allowing the decoupling capacitor to be coupled to the ground voltage via the drain of the first N-type MOSFET and the source of the first N-type MOSFET.

4. The leakage current blocking circuit according to claim 2 , wherein, when the decoupling capacitor is damaged, a first current flowing through the second N-channel depletion-mode MOSFET is greater than a second current flowing through the third N-channel depletion-mode MOSFET, the output end of the inverter outputs a low-voltage signal since the input end of the inverter inputs a high-voltage signal, and the low-voltage signal is used to turn off the first N-type MOSFET to block the leakage current of the decoupling capacitor.

5. A leakage current blocking method for a decoupling capacitor, wherein a first end of the decoupling capacitor is coupled to a power voltage, and the leakage current blocking method comprises:

providing a leakage current blocking circuit coupled between a second end of the decoupling capacitor and a ground voltage, wherein, at least one switch of the leakage current blocking circuit is used to provide a channel allowing the decoupling capacitor to be coupled to the ground voltage when the decoupling capacitor is not damaged; and

the at least one switch of the leakage current blocking circuit being turned off so as to block a leakage current of the decoupling capacitor when the decoupling capacitor is damaged;

wherein the at least one switch is a first N-type MOSFET, a drain of the first N-type MOSFET is coupled to the second end of the decoupling capacitor, and a source of the first N-type MOSFET is coupled to the ground voltage;

wherein the leakage current blocking circuit further includes:

a second N-channel depletion-mode MOSFET, wherein a drain of the second N-channel depletion-mode MOSFET and the drain of the first N-type MOSFET are commonly coupled to the second end of the decoupling capacitor via a first node; and a source of the second N-channel depletion-mode MOSFET and a gate of the second N-channel depletion-mode MOSFET are commonly coupled to a second node; and

an inverter, wherein an input end of the inverter is coupled to the second node, and an output end of the inverter is coupled to a gate of the first N-type MOSFET.

6. The leakage current blocking method according to claim 5 , wherein the leakage current blocking circuit further comprises:

a capacitor, wherein a first end of the capacitor is coupled to the second node, and a second end of the capacitor is coupled to the ground voltage; and

a third N-channel depletion-mode MOSFET, wherein a drain of the third N-channel depletion-mode MOSFET and the first end of the capacitor are commonly coupled to the second node, and a source of the second N-channel depletion-mode MOSFET and a gate of the second N-channel depletion-mode MOSFET are commonly coupled to the inverter input node.

7. The leakage current blocking method according to claim 6 , wherein, when the decoupling capacitor is not damaged, a first current flowing through the second N-channel depletion-mode MOSFET is smaller than a second current flowing through the third N-channel depletion-mode MOSFET, the output end of the inverter outputs a high-voltage signal since the input end of the inverter inputs a low-voltage signal, and the high-voltage signal is used to turn on the first N-type MOSFET for allowing the decoupling capacitor to be coupled to the ground voltage via the drain of the first N-type MOSFET and the source of the first N-type MOSFET.

8. The leakage current blocking method according to claim 6 , wherein, when the decoupling capacitor is damaged, a first current flowing through the second N-channel depletion-mode MOSFET is greater than a second current flowing through the third N-channel depletion-mode MOSFET, the output end of the inverter outputs a low-voltage signal since the input end of the inverter inputs a high-voltage signal, and the low-voltage signal is used to turn off the first N-type MOSFET to block the leakage current of the decoupling capacitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2021
From: SU, HUNG-DER
To: REALTEK SEMICONDUCTOR CORP.
Reel/Frame 057050/0813 →
Priority Claims (1)
TW 109147037 · Dec 31, 2020 · national
Continuity (1)
Related Publication 20220209523A1 · Jun 30, 2022