IP Library Granted Patent US 11,804,813
Granted Patent B2
US 11,804,813 · App. 17/386,287 · Granted Oct 31, 2023

Class D amplifier circuit

Inventors: John Paul Lesso (Edinburgh, GB); Toru Ido (Kanagawa, JP)
Assignee: Cirrus Logic Inc.
H03G3/3089H03F1/26H03F1/32H03F1/34H03F3/187H03F3/217H03F3/2175H03G7/002H03G7/007H03F3/2171H03F3/2173H03F2200/102H03F2200/339H03F2200/432
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,804,813
App. No.
17/386,287
Granted
Oct 31, 2023
Kind
B2
Abstract

This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block.

Claims (20)

1. A Class D amplifier configured to change between first and second operational modes based on a characteristic of an input signal, wherein the amplifier operates in a first operational mode when said characteristic is above a first characteristic threshold and operates in a second operational mode when said characteristic is below a second characteristic threshold.

2. The Class D amplifier according to claim 1 , wherein the second characteristic threshold is different from the first characteristic threshold.

3. The Class D amplifier according to claim 1 , wherein the Class D amplifier is configured to change between the first and second operational modes in normal operation when no fault conditions exist.

4. The Class D amplifier according to claim 1 , wherein the characteristic comprises an indication of an amplitude of the input signal.

5. The Class D amplifier according to claim 1 , wherein the first operational mode is a closed-loop operational mode, and wherein the second operational mode is an open-loop operational mode.

6. The Class D amplifier according to claim 1 , comprising a controller operative to select between the first and second operational modes of the Class D amplifier based on the characteristic of the input signal.

7. The Class D amplifier according to claim 6 , comprising a forward signal path configured to receive the input signal and a feedback path, wherein the controller comprises a signal selector for controlling an extent to which a feedback signal in the feedback path contributes to the forward signal path.

8. The Class D amplifier according to claim 7 , further comprising an error block for generating an error signal based on the input signal and the feedback signal, wherein the signal selector is configured to the select the error signal as the input to the modulator in the first operational mode.

9. The Class D amplifier according to claim 8 , wherein the error block comprises an analogue to digital converter coupled to receive the feedback signal and wherein the signal selector is configured to enable the analogue to digital converter in the closed-loop operational mode and disable the analogue to digital converter in the open-loop operational mode.

10. The Class D amplifier according to claim 8 , comprising at least one variable gain element for applying a variable gain to the feedback signal or the error signal, wherein the signal selector is a controller that is configured to control the at least one variable gain element to provide a first non-zero gain setting in the first operational mode and a second gain setting of zero in the second operational mode.

11. The Class D amplifier according to claim 10 , wherein said controller is configured to control the at least one variable gain element to provide a controlled transition in gain between said first and second gain settings that involves at least one intermediate gain setting.

12. The Class D amplifier according to claim 11 , wherein said controlled transition in gain comprises a ramp in gain.

13. The Class D amplifier according to claim 10 , wherein said at least one variable gain element comprises a loop filter having a variable gain.

14. The Class D amplifier according to claim 13 , wherein the loop filter comprises an integrator and the controller is configured to control the integrator time constant of said integrator to vary the gain of the loop filter.

15. An electronic apparatus comprising a Class D amplifier as claimed in claim 1 .

16. The electronic apparatus as claimed in claim 15 , wherein said apparatus is at least one of: a portable device; a battery power device; a computing device; a communications device; a gaming device; a mobile telephone; a personal media player; a laptop, tablet or notebook computing device.

17. A wireless device comprising a Class D amplifier according to claim 1 .

18. The wireless device according to claim 17 , wherein the wireless device comprises an accessory device, a mobile telephone, headphones, earphones or earbuds.

19. A Class-D amplifier circuit that changes between open-loop and closed-loop operation based on an indication of input signal amplitude so as to provide closed-loop operation at relatively higher signal amplitudes and open-loop operation at relatively lower signal amplitudes.

20. A Class-D amplifier circuit for amplifying an input signal that selectively transitions between an open-loop operational mode and a closed-loop operational mode in response to a characteristic of the amplitude of said input signal so as to provide closed-loop operation at relatively higher signal amplitudes and open-loop operation at relatively lower signal amplitudes.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2023
From: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
To: CIRRUS LOGIC, INC.
Reel/Frame 064384/0486 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2021
From: LESSO, JOHN PAUL; IDO, TORU
To: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
Reel/Frame 056995/0493 →
Priority Claims (1)
GB 1415328 · Aug 29, 2014 · national
Continuity (5)
Continuation 16552843 · Aug 27, 2019
Continuation 15886103 · Feb 1, 2018
Continuation 15466661 · Mar 22, 2017
Continuation 14836006 · Aug 26, 2015
Related Publication 20210351755A1 · Nov 11, 2021