Optimization processing unit utilizing digital oscillators
A system including digital oscillators and at least one programmable interconnect is described. The programmable interconnect(s) provide weights for and selectably couples at least a portion of the digital oscillators. The digital oscillators and the programmable interconnect(s) form an optimization processing unit (OPU). A system for performing reversible logic is also described. The system includes digital oscillators coupled to perform a logic operation and an error correction unit coupled to the digital oscillators. The error correction unit is configured to sample states of the digital oscillators, detect error(s) in the states, and tune connection coefficient(s) between the oscillators in response to detecting the error(s).
1. A system, comprising:
a plurality of digital oscillators; and
at least one programmable interconnect configured to provide weights for and to selectably couple at least a portion of the plurality of digital oscillators,
wherein the plurality of digital oscillators and the at least one programmable interconnect form an optimization processing unit (OPU);
wherein the plurality of digital oscillators includes a plurality of injection locked digital oscillators, each of the plurality of the injection locked digital oscillators being a differential equation solver; and
wherein the differential equation solver is configured to solve at least one governing differential equation for a resistance-inductance-capacitance circuit.
2. The system of claim 1 , wherein the differential equation solver is configured to model a real portion of a state and an imaginary portion of the state, the state corresponding to a phase of an injection locked digital oscillator of the plurality of injection locked digital oscillators.
3. A system, comprising:
a plurality of digital oscillators; and
at least one programmable interconnect configured to provide weights for and to selectably couple at least a portion of the plurality of digital oscillators,
wherein the plurality of digital oscillators and the at least one programmable interconnect form an optimization processing unit (OPU);
wherein the plurality of digital oscillators includes a plurality of injection locked digital oscillators, each of the plurality of the injection locked digital oscillators being a differential equation solver;
wherein the differential equation solver is an Euler's method differential equation solver.
4. A system, comprising:
a plurality of digital oscillators; and
at least one programmable interconnect configured to provide weights for and to selectably couple at least a portion of the plurality of digital oscillators,
wherein the plurality of digital oscillators and the at least one programmable interconnect form an optimization processing unit (OPU);
wherein the plurality of digital oscillators includes a plurality of injection locked digital oscillators, each of the plurality of the injection locked digital oscillators being a differential equation solver;
wherein the differential equation solver is a Kuramoto model differential equation solver.
5. A system, comprising:
a plurality of digital oscillators; and
at least one programmable interconnect configured to provide weights for and to selectably couple at least a portion of the plurality of digital oscillators,
wherein the plurality of digital oscillators and the at least one programmable interconnect form an optimization processing unit (OPU);
wherein the plurality of digital oscillators includes a plurality of injection locked digital oscillators, each of the plurality of the injection locked digital oscillators is a differential equation solver;
wherein the differential equation solver is configured to solve a plurality of coupled differential equations corresponding to a satisfiability problem, the plurality of coupled differential equations including:
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where a m is a constraint term, s t is an Ising spin, G is a diagonal matrix including a m , A is a matrix of constraints, and m and i are integers.
6. The system of claim 1 , wherein at least one the programmable interconnect includes a digital matrix multiplier, the digital matrix multiplier configured to sparsely or fully connect the plurality of digital oscillators.
7. The system of claim 1 , further comprising:
at least one processor coupled to the OPU.
8. A system comprising:
a plurality of digital oscillators coupled to perform a logic operation; and
an error correction unit coupled to the plurality of digital oscillators, the error correction unit configured to sample a plurality of states of the plurality of digital oscillators, detect at least one error in the plurality of states, and tune at least one connection coefficient between the plurality of digital oscillators in response to detecting the at least one error, wherein to tune the at least one connection coefficient, the error correction unit is further configured to:
pin the at least one connection coefficient at a first value corresponding to a logical “1” or a second value corresponding to a logical “0”;
wherein the plurality of digital oscillators includes a plurality of injection locked digital oscillators, wherein each of the plurality of injection locked digital oscillators is a differential equation solver selected from a Kuramoto model differential equation solver and an Euler's method differential equation solver.
9. The system of claim 8 , wherein an injection locked digital oscillator of the plurality of injection locked digital oscillators is configured to model a real portion of a state and an imaginary portion of the state, the state corresponding to a phase of the injection locked digital oscillator.
10. A method, comprising:
receiving, at an optimization processing unit (OPU), data for at least a portion of an optimization problem, the OPU including a plurality of digital oscillators and at least one programmable interconnect, the plurality of digital oscillators including a plurality of injection locked digital oscillators, each of the plurality of injection locked digital oscillators being a differential equation solver;
calculating, in the plurality of digital oscillators, a plurality of responses for the at least the portion of the optimization problem, the calculating the plurality of responses further includes
determining a solution to a differential equation in the differential equation solver utilizing at least one of a Kuramoto model and Euler's method;
applying, via the at least one programmable interconnect, a plurality of weights to the plurality of responses from the plurality of digital oscillators to provide a plurality of weighted responses;
providing, via the at least one programmable interconnect, at least one of the plurality of weighted responses for each of the plurality of digital oscillators as at least one input to each digital oscillator of at least a portion of the plurality of digital oscillators; and
receiving at each of the plurality of digital oscillators an injection lock signal.
11. The method of claim 10 , wherein the receiving further includes:
receiving, at the OPU, the at least the portion of the data for the optimization problem from at least one of a central processing unit coupled with the OPU and a graphics processing unit coupled with the OPU.
12. The method of claim 10 , wherein an injection locked digital oscillator of the plurality of injection locked digital oscillators is configured to model a real portion of a state and an imaginary portion of the state, the state corresponding to a phase of the injection locked digital oscillator.