IP Library › Granted Patent US 12,302,648
Granted Patent B2
US 12,302,648 · App. 17/390,366 · Granted May 13, 2025

Backside illuminated single photon avalanche diode

Inventors: Adarsh Basavalingappa (Penfield, NY); Cristian Tivarus (Pittsford, NY); Sungin Hwang (Pittsford, NY); Yoshiaki Tashiro (Tokyo, JP)
Assignee: Sony Semiconductor Solutions Corporation
H10F30/2255H10F39/199H10F39/803H10F39/8063H10F39/8067H10F39/807H10F39/811
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Quick Facts
Patent No.
US 12,302,648
App. No.
17/390,366
Granted
May 13, 2025
Kind
B2
Abstract

A sensor chip including a resistor and a backside illuminated single photon avalanche diode (SPAD) that is connected to the resistor; and a sensor including a sensor chip with a resistor and a backside illuminated SPAD that is connected to the resistor. The backside illuminated SPAD including an anode, a cathode, and a multiplication structure.

Claims (34)

1. A sensor chip comprising:

a resistor; and

a backside illuminated single photon avalanche diode (SPAD) having a first light incident side and a second side opposite to the first light incident side, the backside illuminated SPAD connected to the resistor and including

an anode disposed on the second side;

a cathode disposed on the second side; and

a multiplication structure.

2. The sensor chip of claim 1 , wherein the cathode is electrically connected to the multiplication structure at approximately a center of the multiplication structure with at least one metal via.

3. The sensor chip of claim 1 , wherein the resistor is a polysilicon resistor.

4. The sensor chip of claim 1 , further comprising a metal reflector to reflect light towards the multiplication structure.

5. The sensor chip of claim 1 , further comprising one or more micro-lenses to focus light on the multiplication structure.

6. The sensor chip of claim 1 , further comprising an inverted pyramid array structure.

7. The sensor chip of claim 1 , further comprising first copper wirings configured to bond with second copper wirings of a logic chip.

8. The sensor chip of claim 1 , wherein a discharge path between the anode and the cathode is approximately at a center of the multiplication structure.

9. The sensor chip of claim 1 , wherein a discharge path between the anode and the cathode is located away from a center of the multiplication structure.

10. The sensor chip of claim 1 , wherein the multiplication structure includes a first implant that is disposed closer to the cathode than the anode and a second implant that is disposed closer to the anode than the cathode, and wherein the second implant has a larger width than the first implant.

11. A sensor comprising:

a sensor chip including a resistor and a backside illuminated single photon avalanche diode (SPAD) pixel structure, the backside illuminated SPAD pixel structure having a first light incident side and a second side opposite to the first light incident side, the backside illuminated SPAD pixel structure is connected to the resistor and includes

an anode disposed on the second side;

a cathode disposed on the second side; and

a multiplication structure.

12. The sensor of claim 11 , wherein the cathode is electrically connected to the multiplication structure at approximately a center of the multiplication structure.

13. The sensor of claim 11 , wherein the resistor is a polysilicon resistor.

14. The sensor of claim 11 , wherein the sensor chip includes at least 100 nanometer (nm) dielectric layer separating the resistor and the backside illuminated SPAD pixel structure.

15. The sensor of claim 11 , wherein the resistor is connected to the cathode.

16. The sensor of claim 11 , wherein the resistor is at least two kilo-ohms (k 106 ).

17. The sensor of claim 11 , further comprising a logic chip including a clamp diode, a PMOS transistor, a plurality of transistors, and a time-to-digital converter (TDC).

18. The sensor of claim 17 , further comprising a metal reflector below the backside illuminated SPAD pixel structure in a stacking direction, wherein the sensor chip is stacked on the logic chip in the stacking direction, the sensor chip and the logic chip forming a two-layer stacked structure with a copper-to-copper connection between the sensor chip and the logic chip.

19. The sensor of claim 17 , wherein the clamp diode is electrically connected to the resistor via copper wirings.

20. A sensor comprising:

a sensor chip including a resistor and a backside illuminated single photon avalanche diode (SPAD) pixel structure, the backside illuminated SPAD pixel structure is connected to the resistor and includes

an anode;

a cathode; and

a multiplication structure,

full trench isolation surrounding the backside illuminated SPAD pixel structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2021
From: BASAVALINGAPPA, ADARSH; TIVARUS, CRISTIAN; HWANG, SUNGIN; TASHIRO, YOSHIAKI
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 057300/0909 →
Continuity (1)
Related Publication 20230030282A1 · Feb 2, 2023
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